Taiwan Semiconductor Manufacturing Comp. Ltd.

Chun-Sheng Wang

Yung-Min Cheng

Ming-Hui Lin

Chi-Hung Liao

Li-Kong Turn

Yao-Tung Liu

Yi-Chang Sung

Shun-An Chen

Juei-Feng Hsu

Louie Liu

Hsin-Hom Chen

Li-Chung Lin

Sheng-Guei Chang

An improved method of wafer height mapping using a wafer level sensor eliminates or substantially minimizes the 'spacing' in the wafer height mapping data usually caused by having an exposure field on a wafer whose width is less than the width of the measurement spot array of the wafer level sensor and also not being a multiple of the width of a single measurement spot. According to the improved method, the measurement spot array is first translated towards one edge of the exposure field and scanned. Then the measurement spot array is translated towards the other edge of the exposure field and scanned second time to map the area that was missed during the first mapping scan.

Method of wafer height mapping

A system for monitoring semiconductor testing tools comprises a tester testing a semiconductor device, whereby a test result is derived, a storage device storing a logic function corresponding to the semiconductor device, and a processor receiving the test result and the logic function from the tester and storage device respectively, and applying the logic function to the test result for validation.

System for validating and monitoring semiconductor testing tools

Within both an electrical test apparatus for electrically testing a substrate, and a method for electrically testing the substrate while employing the electrical test apparatus, there is provided for an automatic selection of an electrical test program, absent operator intervention, once having identified a substrate. Due to the absence of operator intervention, the substrate is more accurately electrically tested.

Microelectronic fabrication electrical test apparatus and method providing enhanced electrical test accuracy

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Jhubei, Taiwan

Chun-Sheng Wang