United Microelectronics Corp.

Chun-Ming Chang

Wen-Jung Liao

Chun-Liang Hou

Chih-Tung Yeh

Shin-Chuan Huang

Bo-Rong Chen

Che-Hung Huang

Yi-Shan Hsu

Ruey-Chyr Lee

Yi-Nan Su

Chen-Wei Lee

Ming-Chang Lu

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer, forming a second barrier layer on the first barrier layer, forming a first hard mask on the second barrier layer, removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.

High electron mobility transistor and method for fabricating the same

A high electron mobility transistor includes a substrate, a mesa structure disposed on the substrate, a passivation layer disposed on the mesa structure, and at least a contact structure disposed in the passivation layer and the mesa structure. The mesa structure includes a channel layer, a barrier layer on the channel layer, two opposite first edges extending along a first direction, and two opposite second edges extending along a second direction. The contact structure includes a body portion and a plurality of protruding portions. The body portion penetrates through the passivation layer. The protruding portions penetrate through the barrier layer and a portion of the channel layer. In a top view, the body portion overlaps the two opposite first edges of the mesa structure without overlapping the two opposite second edges of the mesa structure.

High electron mobility transistor and method for forming the same

A method for forming a high electron mobility transistor is disclosed. A mesa structure having a channel layer and a barrier layer is formed on a substrate. The mesa structure has two first edges extending along a first direction and two second edges extending along a second direction. A passivation layer is formed on the substrate and the mesa structure. A first opening and a plurality of second openings connected to a bottom surface of the first opening are formed and through the passivation layer, the barrier layer and a portion of the channel layer. In a top view, the first opening exposes the two first edges of the mesa structure without exposing the two second edges of the mesa structure. A metal layer is formed in the first opening and the second openings thereby forming a contact structure.

The present invention provides a method of forming an insulating structure of a high electron mobility transistor (HEMT), firstly, a gallium nitride layer is formed, next, an aluminum gallium nitride layer is formed on the gallium nitride layer, then, a first patterned photoresist layer is formed on the aluminum gallium nitride layer, and a groove is formed in the gallium nitride layer and the aluminum gallium nitride layer, next, an insulating layer is formed and filling up the groove. Afterwards, a second patterned photoresist layer is formed on the insulating layer, wherein the pattern of the first patterned photoresist layer is complementary to the pattern of the second patterned photoresist layer, and part of the insulating layer is removed, then, the second patterned photoresist layer is removed, and an etching step is performed on the remaining insulating layer to remove part of the insulating layer again.

Manufacturing method for forminginsulating structure of high electron mobility transistor

A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer and a recess. The group III-V body layer is disposed on the substrate. The group III-V barrier layer is disposed on the group III-V body layer in the active region and the isolation region. The recess is disposed in the group III-V barrier layer without penetrating the group III-V barrier layer in the active region.

Semiconductor device

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer, wherein the composition of the first III-V compound layer and the second III-V compound layer are different from each other. A source electrode and a drain electrode are disposed on the second III-V compound layer. A gate electrode is disposed on the second III-V compound layer between the source electrode and the drain electrode. An insulating layer is disposed between the drain electrode and the gate electrode and covering the second III-V compound layer. Numerous electrodes are disposed on the insulating layer and contact the insulating layer, wherein the electrodes are positioned between the gate electrode and the drain electrode and a distribution of the electrodes decreases along a direction toward the gate electrode.

High electron mobility transistor and method of fabricating the same

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.

An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.

Enhancement mode high electron mobility transistor

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, a first recess, a second recess, a passivation layer, and an etch mask layer. The group III-V barrier layer includes a thinner portion, a first thicker portion and a second thicker portion in the active region, the thinner portion surrounds the first thicker portion, and the second thicker portion surrounds the thinner portion. The first recess is disposed in the group III-V barrier layer in the active region. The second recess is disposed in the group III-V barrier layer in the isolation region.

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.

A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, a group III-V gate structure and a group III-V patterned structure. The group III-V body layer and the group III-V barrier layer are disposed on the substrate. The group III-V gate structure is disposed on the group III-V barrier layer within the active region. The group III-V patterned structure is disposed on the group III-V barrier layer within the isolation region. The composition of the group III-V patterned structure is the same as the composition of the group III-V gate structure.

Growing community of inventors

Kaohsiung, Taiwan

Chun-Ming Chang