Sonix Technology Co., Ltd.

Chun-Jieh Huang

Yin-Hsi Huang

A DMA system includes at lease one read bus, at least one write bus, at least one buffer memory bus, and a DMA controller. The DMA controller comprises a plurality of channels and a bus arbiter. The channels are electrically connected to the read bus, the write bus, and the buffer memory bus. A source address and a destination address of data for each channel are assigned by a control table. The bus arbiter performs bus arbitration and prioritizes data access among the read bus, the write bus, and the buffer memory bus.

Direct memory access system and method

A method and an apparatus analogically output low-resolution digital signals to achieve an equal analog output result of a high-resolution digital signal under a request of signal quality. The low-resolution digital signals are compensatively output multiple times to gain the energy thereof equal to the energy output by the high-resolution digital signal. Therefore, a digital-to-analog conversion with fewer bits satisfies a higher demand for accuracy generally achieved by a digital-to-analog conversion with more bits.

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Changhua, Taiwan

Chun-Jieh Huang