Realtek Semiconductor Inc.

Chun-I Kuo

Chun-Ta Ho

Yi-Jang Wu

Shawn Min

Cheng-Yu Liu

Wen-Tze Chen

A Sigma Delta analog-to-digital converter (ADC) and a method for eliminating idle tones of the Sigma Delta ADC are provided. The Sigma Delta ADC includes a loop filter, a quantizer, an adder and a digital-to-analog converter (DAC). The loop filter performs filtering on a difference between an analog input signal and an analog feedback signal to generate a filtered signal. The quantizer is coupled to the loop filter, and generates a digital output signal according to the filtered signal. The adder is coupled to the quantizer, and adds a digital dithering signal to the digital output signal to generate a digital feedback signal. The DAC is coupled to the loop filter, and generates the analog feedback signal according to the digital feedback signal.

Sigma delta analog-to-digital converter and method for eliminating idle tones of sigma delta analog-to-digital converter

The present application provides a voltage generation circuit and associated capacitor charging method and system. The voltage generation circuit is in a chip and is for generating a first output voltage and a second output voltage. The chip has a first output port and a second output port coupled to a first capacitor and a second capacitor respectively external to the chip. The voltage generation circuit includes a constant current type voltage generation unit and a regulator. When the voltage generation circuit operates in a first mode, the regulator is configured as a unit gain buffer to charge the first capacitor to the first output voltage; and when the voltage generation circuit operates in a second mode, the regulator is configured as a low-dropout regulator to charge the second capacitor to the second output voltage.

Voltage generation circuit and associated capacitor charging method and system

The present invention discloses a bias current generation circuit. An operation amplifier compares an input voltage having a zero-temperature coefficient and a feedback voltage to generate a driving voltage. An output transistor generates a bias current according to the driving voltage. A variable resistive circuit is electrically coupled to the output transistor through a feedback node to generate the feedback voltage according to the bias current and includes series-coupled resistors and switch transistors. Each of the resistors has a resistance having a positive temperature coefficient and includes a current input terminal and a current output terminal. Each of the switch transistors is electrically coupled between the current output terminal of one of the resistors and a ground terminal. One of the switch transistors turns on according to a control voltage variable according to the temperature variation to enable resistors to generate the resistance having a negative temperature coefficient.

Bias current generation circuit

A high voltage tolerant output circuit includes a boost circuit, a first bias circuit, and a buffer circuit. The boost circuit includes a first transistor and an output node. A first terminal of the first transistor is coupled with the output node. The first bias circuit is coupled with the output node and a control terminal of the first transistor, and for dividing the output voltage of the output node. The first bias circuit is further configured to transmit the divided output voltage to the control terminal of the first transistor. The buffer circuit is coupled with a second terminal of the first transistor, and for setting a first voltage of the second terminal of the first transistor. The output voltage is positive correlated to the first voltage, and a maximum value of the output voltage is higher than or equal to a maximum value of the first voltage.

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Hsinchu, Taiwan

Chun-I Kuo