Mediatek Corporation

Mediatek Singapore Pte. Ltd.

Chun-Hsien Peng

Paul Cheng Po Liang

Chao Lu

Hua Wang

Ho-Chi Huang

Zhiming Deng

Yuan-Hwui Chung

Ping-Hsuan Tsu

Chen-Jui Hsu

Jen-Yang Liu

Julia Liu

Chung-Chin Tsai

Sang Won Son

Yen-Liang Chen

Chun-Yu Lin

Chun-Wei Yang

Yu-An Chen

Ying-Chou Shih

I-Cheng Tsai

Ching-Shyang Maa

Pei-Wei Chen

I-No Liao

Hsueh-Wei Chiu

ChiaYu Yang

Hua-Lung Yang

Wei-Chiang Li

A method of reducing memory effect of a power amplifier (PA), for a look-up table (LUT) based memory digital pre-distortion (DPD) circuit of an electronic device is disclosed. The method comprises generating a pre-distorted signal according to a LUT including parameters of an input signal amplitude and an input signal delay associated with a bandwidth of a signal inputted to the memory DPD circuit, and outputting the pre-distorted signal to the PA for improving the nonlinearity of the PA.

Method of reducing memory effect of power amplifier

An integrated circuit (IC) is provided. The IC includes an RF transmitter and an RF receiver. The RF transmitter is configured to generate an RF signal in response to an analog test signal from a test signal generator of a module circuitry that is external to the IC. The RF receiver is configured to generate an outgoing signal according to an input RF signal, and to report the outgoing signal to the module circuitry. The module circuitry performs a test analysis on the RF signal generated by the RF transmitter or on the outgoing signal generated by the RF receiver to determine a test result. The test result is reported to a test equipment having no RF instruments.

RF testing system using integrated circuit

A method employed by a circuit included within a receiver apparatus and configured for performing IQ mismatch compensation when receiver apparatus is operating under data reception mode includes: transforming a data signal, which is generated by a radio frequency receiver under the data reception mode, from time domain into a plurality of frequency bin signals in frequency domain; calculating to obtain at least one frequency domain calibration parameter according to the plurality of frequency bin signals in frequency domain; and, updating at least one coefficient parameter of IQ mismatch compensation according to the obtained at least one frequency domain calibration parameter, to make IQ mismatch compensation compensate IQ mismatch based on the updated at least one coefficient parameter.

Circuit, method, and receiver apparatus for performing on-the-fly IQ mismatch compensation

A power amplifier cell includes a first input arranged to receive an in-phase control signal, a second input arranged to receive a quadrature control signal, an input stage arranged to output a drive signal based at least partly on the received in-phase and quadrature control signals, and an output stage arranged to receive at an input thereof the drive signal output by the input stage, and to generate an output signal for the power amplifier cell in response to the received drive signal.

PA cell, PA module, wireless communication unit, RF transmitter architecture and method therefor

An integrated circuit (IC) is provided. The IC includes an RF transmitter configured to generate an RF signal in response to a command signal from test equipment; an RF receiver configured to generate an evaluation signal according to the RF signal, and report the evaluation signal to the test equipment, so that the test equipment performs a test analysis on the evaluation signal to determine a test result, wherein the test equipment is external to the IC.

RF testing system

An integrated circuit (IC) is provided. The IC includes: an RF transmitter configured to generate an RF signal when the IC has entered a test mode; an RF receiver configured to receive the RF signal in the test mode; and a computation unit having a plurality of processing units that are parallelized to perform a test procedure of the IC according to the received RF signal to determine one or more test results.

RF testing system with parallelized processing

A radio frequency (RF) transmitter has at least one digital signal processing module and at least one power amplifier module. The digital signal processing module includes at least one digital pre-distortion component arranged to receive at least one complex input signal, perform two-dimensional non-uniform mapping of the complex input signal to a first, in-phase, digital pre-distortion control word and a further, quadrature, digital pre-distortion control word, and output the in-phase and quadrature pre-distortion digital control words. The power amplifier module includes a first, in-phase, array of switch-mode power cells and at least one further, quadrature, array of switch-mode power cells. The two-dimensional non-uniform mapping has a pre-distortion profile at least partly based on an input/output relationship for the power amplifier module arranged to generate an analog RF signal based at least partly on the in-phase and quadrature digital pre-distortion control words.

RF transmitter, integrated circuit device, wireless communication unit and method therefor

A radio frequency transmitter includes a digital power amplifier and a bias control circuit. The digital power amplifier is arranged for receiving at least a radio frequency input signal, a digital amplitude control word signal and at least one bias voltage to generate a radio frequency output signal. The bias control circuit is coupled to the digital power amplifier, and is arranged for adjusting the at least one bias voltage according to a power control signal.

Radio frequency transmitter with extended power range and related radio frequency transmission method

A test/calibration system includes a device under test (DUT) and a calibrated device. The calibrated device is coupled to the DUT, transmits or receives a test signal to or from the DUT in response to a control signal for a test item to test, measure or calibrate functioning or performance of an internal component of the DUT.

Low-cost test/calibration system and calibrated device for low-cost test/calibration system

A transceiver capable of IQ mismatch compensation on the fly and a method thereof. The transceiver comprises a transmitter circuit and a loop-back circuit. The transmitter circuit is configured to up-convert a modulation signal on the fly to generate a first RF signal. The loop-back circuit is configured to down-convert the first RF signal and then digitize the down-converted first RF signal to determine a first IQ mismatch parameter based on a first statistical measure of the digitized down-converted RF signal. The transmitter circuit is further configured to compensate for first IQ mismatch in the transmitter circuit according to the first IQ mismatch parameter to generate an IQ compensated modulation signal.

Transceiver capable of IQ mismatch compensation on the fly and method thereof

A radio frequency (RF) transmitter including at least one digital signal processing module is described. The at least one digital signal processing module is arranged to receive a complex digital input signal, successively apply pre-distortion to the received complex digital input signal with a progressively finer granularity, simultaneously progressively increase a sampling rate of the received complex digital input signal, and output a first, in-phase digital control word and a second, quadrature, digital control word for controlling at least one digital power amplifier component to generate an RF signal representative of the received complex digital input signal.

A wireless transmitter has a digital baseband module and a radio-frequency (RF) transmitter. The digital baseband module generates a multi-mode modulated signal by using a plurality of digital synthesizers. The RF transmitter has a frequency synthesizer and a digital power amplifier (DPA). The frequency synthesizer generates an oscillation signal with an RF carrier frequency. The DPA generates a multi-standard RF signal according to the multi-mode modulated signal and the oscillation signal.

Wireless transmitter for multi-mode concurrent transmission of signals complying with different communication standards

A radio frequency (RF) transmitter architecture includes at least one digital signal processing module. The at least one digital signal processing module is configurable to operate in at least a first mode wherein the at least one digital signal processing module is arranged to receive a digital input signal, select, from a reduced set of digital power amplifier (DPA) control values, a plurality of DPA control values based at least partly on the received digital input signal, perform interpolation of the plurality of selected DPA control values to determine a DPA control value from a non-reduced set of DPA control values representative of the received digital input signal, and output to at least one DPA component the determined DPA control value representative of the received digital input signal.

RF transmitter architecture, integrated circuit device, wireless communication unit and method therefor

An IC, a circuitry, and an RF BIST system are provided. The RF BIST system includes a test equipment, a module circuitry, and an IC. The IC is arranged to communicate with the module circuitry by an RF signal in response to a command signal from the test equipment, determine a test result by the RF signal, and report the test result to the test equipment, wherein the module circuitry is external to the IC and the test equipment.

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Nantou County, Taiwan

Chun-Hsien Peng