Unimicron Technology Corporation

Industrial Technology Research Institute

Nippon Electric Glass Co., Ltd.

Chun-Hsien Chien

Wei-Ti Lin

Chien-Chou Chen

Fu-Yang Chen

Yu-Hua Chen

Yu-Chung Hsieh

Wen-Liang Yeh

Ra-Min Tain

Cheng-Hui Wu

Tzyy-Jang Tseng

Hsin-Hung Lee

Po-Chen Lin

Hsuan-Yu Lai

Cheng-Ta Ko

Takahide Fujii

John Hon-Shing Lau

Pei-Wei Wang

Hsin-Yun Hsu

Yasuo Yamazaki

Chia-Sheng Huang

Yi-Cheng Lin

Ting-Yu Ke

Hung-Pin Yu

Bo-Cheng Lin

Yi-Hsiu Fang

A circuit carrier includes a substrate, a first build-up circuit structure, a second build-up circuit structure, a fine redistribution structure and at least one conductive through hole. The substrate has a top surface and a bottom surface opposite to each other. The first build-up circuit structure is disposed on the top surface of the substrate and electrically connected to the substrate. The second build-up circuit structure is disposed on the bottom surface of the substrate and electrically connected to the substrate. The fine redistribution structure is directly attached on the first build-up circuit structure, wherein a line width and a line spacing of the fine redistribution structure are smaller than those of the first build-up circuit structure. The conductive through hole penetrates the fine redistribution structure and a portion of the first build-up circuit structure and is electrically connected to the fine redistribution structure and the first build-up circuit structure.

Circuit carrier and manufacturing method thereof and package structure

An inspection system and an inspection method of a bare circuit board are provided. The inspection system is used for inspecting a bare circuit board. The bare circuit board includes a chip pad and an antenna. The inspection system includes an adapter board, a test device and a measure device. The adapter board includes a chip and a contact structure. The chip is electrically connected to the contact structure. The contact structure touches the chip pad so that the chip is electrically connected to the chip pad. The test device includes a transceiver antenna. The test device and the bare circuit board separate. The measure device is electrically connected to the chip or the transceiver antenna.

Inspection system and inspection method of bare circuit board

A bare circuit board is provided, in which the bare circuit board includes a substrate, an antenna, a chip pad, a ground pattern and a trace. The substrate includes a surface. The antenna and the chip pad are formed on the substrate. The ground pattern is formed on the surface. The trace is formed on the surface and isn't connected to the ground pattern. A measuring gap is formed between the trace and an edge of the ground pattern, and the trace includes a first end and a second end. The first end is electrically connected to the chip pad, whereas the second end is electrically connected to the antenna. The bare circuit board is adapted to transmit a signal. The width of the measuring gap is smaller than a quarter of an equivalent wavelength of the signal.

Bare circuit board

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

Manufacturing method of circuit carrier board structure

An inspection apparatus used for inspecting a bare circuit board is provided, where the bare circuit board includes an antenna. The inspection apparatus includes a holding stage, a probing device, and a measurement device. The holding stage can hold the bare circuit board. The measurement device is electrically connected to the probing device and electrically connected to the antenna via the probing device. The measurement device can input a first testing signal to the antenna. The antenna can input a second testing signal to the measurement device after receiving the first testing signal. The measurement device can measure the antenna according to the second testing signal, where the first testing signal and the second testing signal both pass through no active component.

Inspection apparatus for bare circuit board

A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.

Manufacturing method of package carrier

A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.

Method of manufacturing chip packaging structure

A light-emitting diode package including a carrier structure, a patterned conductive layer, at least one chip, a dielectric layer, at least one first conductive via, a build-up circuit structure, and at least one light-emitting diode is provided. The patterned conductive layer is disposed on the carrier structure. The chip is disposed on the carrier structure. The dielectric layer is disposed on the carrier structure and encapsulates the chip and the patterned conductive layer. The first conductive via penetrates the dielectric layer and is electrically connected to the patterned conductive layer. The build-up circuit structure is disposed on the dielectric layer and electrically connected to the first conductive via. The light-emitting diode is disposed on the build-up circuit structure.

Light-emitting diode package and manufacturing method thereof

A substrate structure includes a glass substrate, a first circuit layer, a second circuit layer, and at least one conductive region. The glass substrate has a first surface and a second surface opposing the first surface. The first circuit layer is disposed on the first surface. The second circuit layer is disposed on the second surface. The conductive region includes a plurality of conductive micro vias. The conductive micro vias penetrate through the glass substrate. The conductive micro vias are electrically connected to the first circuit layer and the second circuit layer, and the conductive micro vias have a via size of 2 &#x3bc;m to 10 &#x3bc;m.

Substrate structure and manufacturing method thereof

Package carrier and manufacturing method thereof

A method of preparing a package structure is provided, which includes providing a carrier plate including a supporting layer, a first release layer, and a first metal layer; forming a first dielectric layer over the first metal layer, the first dielectric layer having a plurality of holes, each of the holes having an end portion substantially coplanar with each other at a same plane; forming a plurality of conductive protrusions filling the holes, each of the conductive protrusions having a first end and a second end opposite thereto; forming a circuit layer structure including at least one circuit layer and at least one second dielectric layer, the circuit layer being connected to the second end, the second dielectric layer being disposed over the circuit layer; removing the carrier plate; and removing a portion of the first dielectric layer to expose the conductive protrusions. A package structure is also provided.

Package structure and preparation method thereof

A circuit carrier board includes a first substrate and a second substrate bonding to the first substrate. The first substrate includes a first circuit layer connecting to a plurality of conductive structure. The conductive structures connect to electronic elements. The second substrate contacts the first circuit layer. The second substrate includes a plurality of stacked dielectric layers, and a plurality of second circuit layers are disposed in the dielectric layers. The bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and the topmost layer of the second circuit layers is electrically connected to the first circuit layer. The conductive structure includes a pad and a conductive via. The pad electrically connects to the first circuit layer. A linewidth of the first circuit layer is smaller than a linewidth of the second circuit layer. A manufacturing method of the circuit carrier board is also provided.

Circuit carrier board and manufacturing method thereof

A circuit carrier board includes a first build-up layer structure, a substrate, an adhesive layer, and a conductive structure. The first build-up layer includes a plurality of first dielectric layers and a plurality of first circuit layers original stacked. The substrate includes a base and a second build-up layer structure disposed on the base. The second build-up layer structure includes a plurality of second dielectric layers and a plurality of second circuit layer original stacked. A top most layer of the second circuit layers is exposed outside of the second dielectric layers. The conductive structure penetrates through the first dielectric layers, the first circuit layers and the adhesive layer, and contacts with the top most layer of the second circuit layers. The conductive structure electrical connects the first circuit layers to the second circuit layers. A manufacturing method of the circuit carrier board is also provided.

A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure.

Manufacturing method of substrate structure

A package carrier structure includes an insulating substrate, a first wiring layer, a second wiring layer, at least one conductive via, a plurality of first and second conductive pads, a first insulating layer, a plurality of first and second conductive structures, and an encapsulated layer. The first and second wiring layers are disposed on the upper and lower surfaces of the insulating substrate respectively. The conductive via penetrates through the insulating substrate and electrically connected to the first and second wiring layers. The first and second conductive pads are disposed on the upper surface and electrically connected to the first wiring layer. The first insulating layer is disposed on the upper surface and exposing the first and second conductive pads. The first and second conductive structures are disposed on the first and second conductive pads respectively. The lower surface of the insulating substrate is covered by the encapsulation layer.

Growing community of inventors

Taipei, Taiwan

Chun-Hsien Chien