Au Optronics Corporation

Chun-Hao Tu

Jiun-Jye Chang

Kuo-Sen Kung

Yu-Jung Liu

Jen-Pei Tseng

Ren-Hong Jhan

Wei-Cheng Wu

Fang-Hui Chan

Ting-Chun Lin

Wei-Ting Lin

Po-Lun Chen

Chia-Hsiang Chen

Hao-Lun Hsieh

Ming-Chin Hung

Jung-Hui Hsu

Ya-Zhi Hsiao

Jun-Hong Jan

Wei-Jhih Lian

A method for manufacturing a patterned layer includes the steps of: providing a substrate having a first surface and a second surface opposite to the first surface; providing a material source for supplying a plurality of charged particles, in which the first surface faces the material source; providing a magnetic element, in which the second surface is arranged between the magnetic element and the first surface; and depositing the charged particles on the first surface through using the magnetic element so as to form a patterned layer. A method for manufacturing an electrochromic device is disclosed as well.

Method for manufacturing patterned layer and method for manufacturing electrochromic device

A three-dimensional display device includes a display panel and a barrier structure. The barrier structure is located at one side of the display panel. Besides, the barrier structure includes a plurality of barrier patterns and a plurality of transparent slits. The barrier patterns and the transparent slits are arranged alternately. In particular, the barrier patterns include a photoelectric conversion structure.

Three-dimensional display device

A power tracking device and a power tracking method is disclosed herein. The power tracking device includes a power voltage setting circuit, a switch, a switching signal circuit, and a voltage memory circuit. The switching signal circuit is configured for sending a first control signal to the switch. When the switch receives the first control signal and electrically isolates the power source and the power voltage setting circuit, the voltage memory circuit stores an open circuit voltage of the power source and sends a setting voltage relative to the open circuit voltage, and when the switch receives the first control signal and electrically connects the power source and the power voltage setting circuit, the power voltage setting circuit sets an output voltage of the power source to correspond with the setting voltage.

Power tracking device and power tracking method

An electronic apparatus and a display thereof are disclosed. The display includes a back plate, a photoelectric converting module, and a display module. The back plate has an inner surface and an open is formed on the back plate. The back plate has an inner edge around the open. The inner edge is concave toward the direction back to inner surface to form a supporting part. The photoelectric converting module is disposed on the supporting part without protruding out of the inner surface. The photoelectric converting module has a light-receiving surface exposed to the open. The display module is disposed on the inner surface of the back plate and the display module covers the photoelectric converting module. The display module has a display surface back to the photoelectric converting module.

Electronic apparatus and display thereof

An electronic device including a display unit and a photoelectric conversion board is provided. The display unit includes a display surface and a back surface which are opposite to each other, and an edge of the photoelectric conversion board is rotatably connected to the back surface of the display unit. The photoelectric conversion board includes a substrate, a first photoelectric conversion unit, and a second photoelectric conversion unit. The substrate has a first surface and a second surface which are opposite to each other, the first photoelectric conversion unit is disposed on the first surface, the second photoelectric conversion unit is disposed on the second surface, and an absorption band of the first photoelectric conversion unit is different from an absorption band of the second photoelectric conversion unit.

Electronic device

A thin film transistor is provided. The thin film transistor includes a substrate, a gate, a gate insulating layer, a source and a drain, a channel layer, and first and second patterned passivation layers. The gate is disposed on the substrate. The gate insulating layer is disposed on the gate. The source and the drain are disposed on the gate insulating layer. The channel layer is disposed above or under the source and the drain, wherein a portion of the channel layer is exposed between the source and the drain. The first patterned passivation layer is disposed on the portion of the channel layer, wherein the first patterned passivation layer includes metal oxide, and the first patterned passivation layer has a thickness ranging from 50 angstroms to 300 angstroms. The second patterned passivation layer covers the first patterned passivation layer, the gate insulating layer, and the source and the drain.

Thin film transistor having a patterned passivation layer

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Hsin-Chu, Taiwan

Chun-Hao Tu