Intersil Americas Inc.

Renesas Electronics America Inc.

Chun Cheung

Robert H Isham

Weihong Qiu

Weihong Qui

Mir Mahin

Paul Dackow

Gustavo James Mehas

Matthew Burdet Harris

Brandon Day

Emil Chen

Ankit Sharma

Michael Jason Houston

Kunrong Wang

Mehul Dilip Shah

Shea Lynn Petricek

Zhixiang Liang

Paul K Sferrazza

Ruchi Parikh

Aaron Shreeve

Faisal Ahmad

Bo Wang

Fumihito Hayashi

Stan Wietecha

Yuji Ikeda

Brandon Howell

Keerthi Varman Anna Jayaprakash

Methods and systems for operating a voltage regulator are described. A integrated circuit can be configured to adjust at least one of a deadtime parameter and a drive strength parameter of a power stage based on at least one of an input voltage being provided to a power stage, a switch node voltage of the power stage, and an output current of the power stage. A controller of the power stage can be further configured to adjust a deadtime of the power stage based on adjustment of the deadtime parameter. The controller can be further configured to adjust a drive strength of the first driver and the second driver based on adjustment of the drive strength parameter.

Power stage adaptive deadtime and drive strength

Systems, apparatuses, and methods for charging a bootstrap capacitor of a device during low power states are described. In an example, an apparatus can include a controller configured to enable a low power state of the device. The device can include a high side switching element and a low side switching element. The controller can, in response to the low power state of the device being enabled, operate the low side switching element of the device to charge the bootstrap capacitor of the device. The controller can, in response to the low power state of the device being enabled and a level of a control signal being a first level, activate the low side switching element to charge the bootstrap capacitor of the device.

Boot capacitor charge during low power states

Methods and apparatuses for controlling an apparatus comprising a controller integrated in a first slave device. In an example, the controller can detect a sensed current of the first slave device. The controller can receive a voltage signal associated with a second slave device connected to the first slave device. The controller can generate a correction current based on the sensed current of the first slave device and the voltage signal. The controller can modulate a pulse width modulation (PWM) signal received by the first slave device using the correction current. The controller can control a power converter using the modulated PWM signal.

Integrated current sharing schemes for multiplying power stages support of a multiphase controller

According to certain aspects, the present embodiments are directed to techniques for providing the ability to monitor one or more operational parameters of a voltage regulator. In embodiments, the voltage regulator is a multiphase voltage regulator having a plurality of power stages corresponding to each respective phase. In these and other embodiments, the operational parameters include one or both of a phase current and a phase temperature. According to certain additional aspects, the present embodiments provide the ability to monitor the respective phase current output and phase temperature of each phase independently. According to further aspects, this ability to monitor the operational parameters is achieved while minimizing circuit complexity.

Combining temperature monitoring and true different current sensing in a multiphase voltage regulator

Systems and methods for detecting an open condition in a master-slave configuration are described. In an example, a controller can be integrated in a slave device of a master-slave configuration. The controller can be configured to activate a current source to supply a current to a pin of the slave device. The controller can be further configured to compare a voltage measured at the pin of the slave device with a reference voltage. The controller can be further configured to, based on the comparison, determine a presence or an absence of an open condition associated with the pin of the slave device. The controller can be further configured to output a signal representing the determination of the presence or the absence of the open condition to a master device.

Open condition sensing and protection

The present embodiments relate to methods and apparatuses for providing fault protection in a power controller such as a voltage regulator, and particularly protection against reverse over current fault conditions. Some embodiments are capable of distinguishing between different types of reverse over current conditions, such as a high-side short or a normal over voltage condition. In these and other embodiments, fault protection is performed in favor of a load connected to the voltage regulator, rather than components of the voltage regulator itself.

Method and apparatus for reverse over current protection

A modulator configured to control switching of current through an inductor of a converter according to a current limiting scheme while converting an input voltage to an output voltage, which includes a current limit generator and a comparator network. The current limit generator is configured to provide a periodic ramping current limit value based on either the input voltage or the output voltage, an inductance of the inductor, a timing signal, and a predetermined maximum output current of the boost converter. The comparator network is configured to provide a switch control signal to control switching of current through the inductor by comparing a current sense value indicative of a current through the inductor with a lesser of a compensation error value and the periodic ramping current limit value. The converter may be configured as a peak current mode control converter in either boost or buck mode.

Current limiting scheme for a converter

A method of operating a regulator controller IC for performing intermittent diode braking for controlling a multiple phase voltage regulator. The method includes receiving at least one signal for detecting repetitive load transients, determining a rate of the repetitive load transients, generating diode braking control signals, each for applying diode braking to a corresponding one of multiple phases for at least one load transient when the repetitive load transients are below a first rate, and controlling the diode braking control signals to drop application of diode braking of at least one phase for at least one load transient when the repetitive load transients are at least the first rate. The method may include rotating the application of diode braking among the phases during successive applications of diode braking. The method may include dropping an increased number of phases for diode braking as the rate of repetitive load transients is increased.

System and method of intermittent diode braking for multiple phase voltage regulator

Systems, methods, and apparatus for improving steady state operation of a pulse width modulator during transient and soft start events are described herein. An apparatus can include a phase component configured to adaptively modify a pulse width of a first pulse width modulated (PWM) output signal based on a pulse width of a PWM input signal. Further, the apparatus can include a power stage component configured to source at least one of a voltage or a current to a load based on the first PWM output signal. In one example, the phase component can be configured to linearly extend the pulse width of the first PWM output signal based on the pulse width of the PWM input signal. In another example, the phase component can be configured to adaptively modify the pulse width of the first PWM output signal based on a predetermined maximum pulse width.

Method and apparatus for adaptively modifying a pulse width of a pulse width modulated output

An apparatus for providing programmable hysteresis control using an enable pin of a device is disclosed. An enable pin is configured to receive an input signal to enable and disable an associated device responsive to the input signal. A current sink is attached to the enable pin and is responsive to circuitry that disables the current sink responsive to application of the input signal at a first voltage level and enables the current sink responsive to application of the input signal at a second voltage level.

Enable pin using programmable hysteresis improvement

Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.

Controller and driver communication for switching regulators

A pulse control system for a multiphase regulator including an error amplifier, a multiphase generator, and an adaptive controller. The error amplifier provides an error signal indicative of output voltage error. The multiphase generator develops modulation pulses for phases based on the error signal. The adaptive controller is responsive to a load indication signal and redirects at least one modulation pulse from a first of phase to a second phase. The load indication signal may be received from a microprocessor indicating a low power mode. The adaptive controller provides a smooth and efficient transition to low load conditions by dropping operation of one or more phases and redirecting modulation pulses to the remaining one or more phases, and reduced phases improve power efficiency for the low load conditions.

Pulse adding scheme for smooth phase dropping at light load conditions for multiphase voltage regulators

An integrated circuit has a single input pin for determining a value associated with a resistor divider. First circuitry determines a resistor ratio of the resistor divider through the single input pin. A first register stores a first group of bits representing the resistor ratio. The first group of bits represents the least significant bits of the value. Second circuitry determines an equivalent resistance of the resistor divider through the single input pin. A second register stores a second group of bits representing the equivalent resistance.

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Brooklyn, NY, United States of America

Chun Cheung