Advanced Semiconductor Engineering, Inc.

National Sun Yat-sen University of Kaohsiung

Chun-Che Lee

Tien-Szu Chen

Yuan-Chang Su

Wen-Yao Huang

Hsu-Feng Lee

Steven Holdcroft

Sheng-Ming Wang

Chih-Cheng Lee

Kuang-Hsiung Chen

You-Lung Yen

Kun-Ching Chen

Ming-Chiang Lee

Jun-jie Pang

Yi-yun Hsu

Yu-chao Tseng

Benjamin Britton

Bernd Karl Appelt

Yu-Ying Lee

Yi-Chuan Ding

Shih-Chang Lee

Guo-Cheng Liao

Yung-I Yeh

Shih-Fu Huang

Shyh-Ing Wu

Ming Chiang Lee

Kay Stephan Essig

Tao-Yu Chen

Wu-Chang Wang

Wen-Chi Cheng

Ming-Loung Lu

Chun-Hsiung Huang

A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Semiconductor substrate and method for manufacturing the same

Semiconductor substrate mitigating bridging

A semiconductor substrate includes an insulating layer and a conductive circuit layer embedded at a surface of the insulating layer. The conductive circuit layer includes a first portion and a second portion. The first portion includes a bonding pad and one portion of a conductive trace, and the second portion includes another portion of the conductive trace. An upper surface of the first portion is not coplanar with an upper surface of the second portion. A semiconductor packaging structure includes the semiconductor substrate.

Semiconductor substrate and manufacturing method thereof

A polymer of fluorine-containing sulfonated poly(arylene ether)s and a manufacturing method thereof are provided. The polymer is formed by processing a nucleophilic polycondensation between a fluorine-containing monomer having an electron-withdrawing group and a multi-phenyl monomer. A main structure of the polymer of fluorine-containing sulfonated poly(arylene ether)s has a first portion with fluoro or trifluoromethyl substituted phenyl groups, and a second portion with sulfonated phenyl groups.

Polymer of fluorine-containing sulfonated poly(arylene ether)s and method of manufacturing the same

A semiconductor package substrate includes a core portion, an upper circuit layer and a plurality of pillars. The pillars are disposed on and project upward from the upper circuit layer. Top surfaces of the pillars are substantially coplanar. The pillars provide an electrical interconnect to a semiconductor die. Solder joint reliability as between the substrate and the semiconductor die is improved.

Substrate for semiconductor package and process for manufacturing

An embedded component device includes an electronic component including an electrical contact, an upper patterned conductive layer, a dielectric layer between the upper patterned conductive layer and the electronic component, a first electrical interconnect, a lower patterned conductive layer, a conductive via, and a second electrical interconnect. The dielectric layer has a first opening exposing the electrical contact, and a second opening extending from the lower patterned conductive layer to the upper patterned conductive layer. The first electrical interconnect extends from the electrical contact to the upper patterned conductive layer, and fills the first opening. The second opening has an upper portion exposing the upper patterned conductive layer and a lower portion exposing the lower patterned conductive layer. The conductive via is located at the lower portion of the second opening. The second electrical interconnect fills the upper portion of the second opening.

Embedded component device and manufacturing methods thereof

A polymer of sulfonated poly(arylene ether)s (PAEs) and a manufacturing method thereof are provided. A main structure of the PAEs has a first side formed by multi-phenyl glycol monomer and a second side formed by multi-phenyl dihalo monomer with an electron-withdrawing group. The glycol monomer and the dihalo monomer are reacted with each other by a nucleophilic displacement reaction, so as to form the main structure of the PAEs. A film made of the PAEs has a better size stability under a high water uptake.

Polymer of sulfonated poly(arylene ether)s and manufacturing method thereof

The present disclosure relates to a semiconductor substrate and a method for making the same. The semiconductor substrate includes an insulation layer, a first circuit layer, a second circuit layer, a plurality of conductive vias and a plurality of bumps. The first circuit layer is embedded in a first surface of the insulation layer, and exposed from the first surface of the insulation layer. The second circuit layer is located on a second surface of the insulation layer and electrically connected to the first circuit layer through the conductive vias. The bumps are directly located on part of the first circuit layer, where the lattice of the bumps is the same as that of the first circuit layer.

Semiconductor substrate and method for making the same

Polymer of sulfonated poly(arlene ether)s and manufacturing method thereof

A fuel cell catalyst layer having sulfonated poly(arylene ether)s and a manufacturing method therefor are provided. The manufacturing method includes steps of: providing at least one type of sulfonated poly(arylene ether)s; mixing the sulfonated poly(arylene ether)s with a catalyst composition to prepare a catalyst slurry; and coating the catalyst slurry to form a film which is dried to be an electrode catalyst layer, in which the weight ratio of the sulfonated poly(arylene ether)s is 5-50 wt %. The sulfonated poly(arylene ether)s in the electrode catalyst layer can provide good thermal stability, glass transition temperature, chemical resistance, mechanical properties, water impermeability, low proton transmission loss, and a relatively simple process to shorten the manufacturing time and lower the cost thereof.

Fuel cell catalyst layer having sulfonated poly(arylene ether)s and manufacturing method thereof

A process for fabricating a circuit board that includes a dielectric layer, a circuit layer, and an insulation layer. The circuit layer is disposed on the dielectric layer and has a pad region and a trace region. The insulation layer is disposed on the circuit layer and covers the trace region. Here, a thickness of the pad region is less than a thickness of the trace region.

Process of fabricating a circuit board

The package structure includes a metal sheet having a first central block, a plurality of first metal blocks, a second central block and a plurality of second metal blocks, a first finish layer and a second finish layer, at least a chip disposed on the metal sheet and a package body encapsulating the chip. The package structure may further include at least an area block for wire routing.

Leadframe package structure and manufacturing method thereof

Growing community of inventors

Kaohsiung, Taiwan

Chun-Che Lee