Integrated System Solution Corporation

Chun-Chang Lin

Albert Chen

Kuang-Ping Ma

Chen-Yen Huang

An apparatus of sequentially decoding CCK codes includes a series of received signal registers used to respectively temporarily save the received signals, a phase selector used to select one numeral from 1, &#x2212;1, j or &#x2212;j respectively for CCK code of each chip to multiple with the signal register, a series of adders used to sequentially complete adding operation, a series of sequential operation registers used to save values obtained from the sequential selecting operation of the phase selectors and the sequential adding operation of the adders, and a comparing device used to select a maximal value from those saved in the operation registers. The comparing device includes a comparator and a maximum register. According to the invention, the data processing speeds up while the hardware complexity is reduced.

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Hsin-Chu, Taiwan

Chun-Chang Lin