International Business Machines Corporation

Lenovo (Singapore) Pte. Ltd.

Chulho Kim

Hanhong Xue

Robert Sidney Blackmore

Ravi Kumar Arimilli

Balaram Sinharoy

Rajeev Sivaram

Rama Krishna Govindaraju

Ramakrishnan Rajamony

Lakshminarayana Baba Arimilli

Paul D DiNicola

Tsai-Yang Jea

Kevin J Gildea

Gautam H Shah

Richard R Treumann

Hung Q Thai

Deryck X Hong

Carl Alfred Bender

Myung Mun Bae

Piyush Chaudhary

Jamshed H Mirza

Uman Chan

Scott D Epter

Amy Xin Chen

Zenon J Piatek

Abhinav Vishnu

Gary David Cudak

William John Starke

Ajay Dholakia

Peter H Hochschild

Ronald Nick Kalla

Srihari Venkata Angaluri

Su-Hsuan Huang

Xin Chen

Charles J Archer

Gregory Brian Pruett

Sumeet Kochar

Jay Robert Herring

Gili Mendel

John Scott Houston

Donald G Grice

James Steven Worley

Leonard W Helmer, Jr

William G Tuel, Jr

Steven J Martin

Richard J Coppinger

Fu Chung Chang

Jason E Goscinski

Patricia E Heywood

Radha R Kandadai

Lakshminarayana B Armilli

Lakshimarayana B Arimilli

Jaroslaw Nieplocha

A method includes obtaining component utilization data for multiple components of a compute node during at least one previous execution of a workload. The method further includes using the component utilization data to identify a first component having a utilization level that is less than a threshold utilization level during the at least one previous execution of the workload, wherein the first component is one of the multiple components of the compute node. The method still further includes, during a subsequent execution of the workload on the compute node, throttling the first component to prevent the first component from exceeding the threshold utilization level.

Reducing power consumption of a compute node experiencing a bottleneck

A method includes identifying a subset of components of a node that should be loaded during the next boot of the node, storing a list of the identified subset of components in a file outside of a basic input output system, and initiating boot of the node. The method further comprises the basic input output system accessing the file and controlling boot of the node to load only the identified subset of components of the node. Another method stores a plurality of such files, wherein each file is associated with maintenance of a target component of the node. After selecting one of the files, the basic input output system may access the selected file and control boot of the node to load only the subset of components that the selected file indicates should be loaded for purposes of a maintaining or testing the target component.

Selective loading of components within a node to speed up maintenance actions

A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.

Flow control for reliable message passing

Administering group identifiers of processes in a parallel computer includes each process in a set of processes, receiving from a compute node of the plurality of compute nodes, a request to establish the set of processes as an operational group including receiving a list of process identifiers for each process of the set of processes. Embodiments also include each process generating without communication amongst the processes, a unique group identifier in dependence upon the list of process identifiers.

Administering group identifiers of processes in a parallel computer

A technique for debugging code during runtime includes providing, from an outside process, a trigger to a daemon. In this case, the trigger is associated with a registered callback function. The trigger is then provided, from the daemon, to one or more designated tasks of a job. The registered callback function (that is associated with the trigger) is then executed by the one or more designated tasks. Execution results of the executed registered callback function are then returned (from the one or more designated tasks) to the daemon.

Techniques for debugging code during runtime

A data processing system enables global shared memory (GSM) operations across multiple nodes with a distributed EA-to-RA mapping of physical memory. Each node has a host fabric interface (HFI), which includes HFI windows that are assigned to at most one locally-executing task of a parallel job. The tasks perform parallel job execution, but map only a portion of the effective addresses (EAs) of the global address space to the local, real memory of the task's respective node. The HFI window tags all outgoing GSM operations (of the local task) with the job ID, and embeds the target node and HFI window IDs of the node at which the EA is memory mapped. The HFI window also enables processing of received GSM operations with valid EAs that are homed to the local real memory of the receiving node, while preventing processing of other received operations without a valid EA-to-RA local mapping.

Host fabric interface (HFI) to perform global shared memory (GSM) operations

A method performed in a data processing system initiates an asynchronous memory move (AMM) operation, whereby a processor performs a move of data in virtual address space from a first effective address to a second effective address and forwards parameters of the AMM operation to asynchronous memory mover logic for completion of the physical movement of data from a first memory location to a second memory location. The processor executes a second operation, which checks a status of the completion of the data move and returns a notification indicating the status. The notification indicates a status, which includes one of: data move in progress; data move totally done; data move partially done; data move cannot be performed; and occurrence of a translation look-aside buffer invalidate entry (TLBIE) operation. The processor initiates one or more actions in response to the notification received.

Reporting of partially performed memory move

A data processing system includes a mechanism for completing an asynchronous memory move (AMM) operation in which the processor receives an AMM ST instruction and processes a processor-level move of data in virtual address space and an asynchronous memory mover then completes a physical move of the data within the real address space (memory). A status/control field of the AMM ST instruction includes an indication of a requested treatment of the lower level cache(s) on completion of the AMM operation. When the status/control field indicates an update to at least one cache should be performed, the asynchronous memory mover automatically forwards a copy of the data from the data move to the lower level cache, and triggers an update of a coherency state for a cache line in which the copy of the data is placed.

Cache management during asynchronous memory move operations

A distributed data processing system includes: (1) a first node with a processor, a first memory, and asynchronous memory mover logic; and connection mechanism that connects (2) a second node having a second memory. The processor includes processing logic for completing a cross-node asynchronous memory move (AMM) operation, wherein the processor performs a move of data in virtual address space from a first effective address to a second effective address, and the asynchronous memory mover logic completes a physical move of the data from a first memory location in the first memory having a first real address to a second memory location in the second memory having a second real address. The data is transmitted via the connection mechanism connecting the two nodes independent of the processor.

Asynchronous memory move across physical nodes with dual-sided communication

A method and data processing system for tracking global shared memory (GSM) operations to and from a local node configured with a host fabric interface (HFI) coupled to a network fabric. During task/job initialization, the system OS assigns HFI window(s) to handle the GSM packet generation and GSM packet receipt and processing for each local task. HFI processing logic automatically tags each GSM packet generated by the HFI window with a global job identifier (ID) of the job to which the local task is affiliated. The job ID is embedded within each GSM packet placed on the network fabric. On receipt of a GSM packet from the network fabric, the HFI logic retrieves the embedded job ID and compares the embedded job ID with the ID within the HFI window(s). GSM packets are forwarded to an HFI window only when the embedded job ID matches the HFI window's job ID.

Mechanism to prevent illegal access to task address space by unauthorized tasks

A data processing system includes a set of architected registers within which the processor places state and other information to communicate with the asynchronous memory mover in order to initiate and control an AMM operation. The asynchronous memory mover performs an asynchronous memory move (AMM) operation in response to receiving a set of parameters within the architected registers, which parameters are associated with an AMM store instruction executed by the processor to initiates a move of data in virtual space before placing the information in the architected registers. The architected registers are processor architected registers, defined on a per thread basis by a compiler, or memory mapped architected registers allocated for communicating with the asynchronous memory mover during a bind and subsequent execution of an application. The architected registers are also utilized to store state information to enable a restore to a point before execution of the AMM operation.

Mechanisms for communicating with an asynchronous memory mover to perform AMM operations

A method and data processing system for performing fence operations within a global shared memory (GSM) environment having a local task executing on a processor and providing GSM commands for processing by a host fabric interface (HFI) window that is allocated to the task. The HFI window has one or more registers for use during local fence operations. A first register tracks a first count of task-issued GSM commands, and a second register tracks a second count of GSM operations being processed by the HFI. The processing logic detects a locally-issued fence operation, and responds by performing a series of operations, including: automatically stopping the task from issuing additional GSM commands; monitoring for completion of all the task-issued GSM commands at the HFI; and triggering a resumption of issuance of GSM commands by the task when the completion of all previous task-issued GSM commands is registered by the HFI.

Mechanisms to order global shared memory operations

A method for issuing global shared memory (GSM) operations from an originating task on a first node coupled to a network fabric of a distributed network via a host fabric interface (HFI). The originating task generates a GSM command within an effective address (EA) space. The task then places the GSM command within a send FIFO. The send FIFO is a portion of real memory having real addresses (RA) that are memory mapped to EAs of a globally executing job. The originating task maintains a local EA-to-RA mapping of only a portion of the real address space of the globally executing job. The task enables the HFI to retrieve the GSM command from the send FIFO into an HFI window allocated to the originating task. The HFI window generates a corresponding GSM packet containing GSM operations and/or data, and the HFI window issues the GSM packet to the network fabric.

Generating and issuing global shared memory operations via a send FIFO

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Poughkeepsie, NY, United States of America

Chulho Kim