Samsung Electronics Co., Ltd.

Chulho Choi

Yongjoo Song

Hajoon Shin

Jinwoo Kim

Sungjin Lim

Minhwa Jang

Kyunlyeol Lee

Yu-chieh Huang

Shih-Hsiung Kuo

Han-chiang Su

Yi-chien Wen

Hyunje Park

Chao Hsuan Liu

Shih-chiao Huang

Jia Wei Chen

Myungho Seo

Chui-Hsun Chiu

Yu-Chieh Huang

Jia-way Chen

Beophee Kim

Jia-Way Chen

Ching-Chieh Wu

Yu-Wen Chiou

Ying-Da Chang

Shih Chiao Huang

Zhen-Guo Ding

Hanchiang Su

Tao-Jung Hung

Yichien Wen

A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CKand a first complementary clock signal CK, which is 180° out-of-phase relative to CK, (ii) a second gamma division circuit configured to generate a second gamma tap voltage by performing voltage division of the upper gamma tap voltage and the first gamma tap voltage, in-sync with a second clock signal CKand a second complementary clock signal CK, which is 180° out-of-phase relative to CK, and (iii) a third gamma division circuit configured to generate a third gamma tap voltage by performing voltage division of the first gamma tap voltage and the lower gamma tap voltage, in response to CKand CK, which have a lower frequency relative to CKand CK

Gamma tap voltage generating circuits and display devices including the same

The present disclosure provides methods, apparatuses, and non-transitory computer-readable mediums for setting charge sharing times, which may be adaptable to a display panel. In some embodiments, the apparatus includes a pixel array and a source driver configured to drive each column of the pixel array. In some embodiments, a setting method of charge sharing times includes grouping a plurality of pixels of a pixel array in a row direction to form a plurality of pixel groups. The setting method further includes setting a charge sharing time of each pixel group of the plurality of pixel groups according to a quantity of pixel groups in the plurality of pixel groups. A charge sharing time of a pixel group located closest to a source driver in the pixel array is greater than a charge sharing time of a pixel group located farthest from the source driver in the pixel array.

Setting method of charge sharing time and non-transitory computer-readable medium

A display device includes a display panel including data lines configured to receive an image signal, gate lines configured to receive a scan signal, and gate connection lines configured to transmit the scan signal to the gate lines; and a multi-chip film package including, on a film, a first gate integrated circuit (IC) configured to transmit a first scan signal to the gate connection lines through first gate output lines, a second gate IC configured to transmit a second scan signal to the gate connection lines through second gate output lines, and a source IC configured to transmit the image signal to the data lines through source output lines. Each of the first gate output lines is between two adjacent source output lines, and each of the second gate output lines is between two adjacent source output lines.

Display device including multi-chip film package having plurality of gate integrated circuits mounted thereon

A display apparatus includes a display panel including a plurality of horizontal lines each including a plurality of pixels, a timing controller configured to output a polarity control signal representing a polarity corresponding to each of the plurality of horizontal lines and having a value inverted by n horizontal line units, and a source driver configured to generate a timing pulse signal sequentially representing a data charging time of each of the plurality of horizontal lines and to output a data voltage, having a polarity corresponding to each of the plurality of horizontal lines, to the display panel on the basis of the timing pulse signal. When a value of the polarity control signal is inverted, the source driver generates the timing pulse signal including a data charging time corresponding to a count value obtained by counting a number of horizontal lines after a polarity is inverted.

Source driver controlling data charging times of horizontal lines of a display panel, display apparatus including the same, and operating method of the source driver

A display driving integrated circuit includes a common voltage buffer configured to provide a common voltage to a display panel and when a line outputting the common voltage and a gate line are short-circuited, apply a first current to the gate line or receive a second current from the gate line; a current generator configured to sum currents respectively corresponding to the first current and the second current and output an output current obtained by the summing; and a current detector configured to convert the output current into an output voltage and output a high or low signal based on a result of comparing the output voltage with a preset voltage.

Display driving integrated circuit and display device for short circuit detection

A display driver device includes a timing controller, a display driver integrated circuit, a flexible printed circuit board, a connection line, and a test line. The timing controller includes an output pad unit. The display driver integrated circuit includes an input pad unit. The connection line is formed at the flexible printed circuit board to electrically connect the input pad unit with the output pad unit. The test line is formed at the flexible printed circuit board, and is used to provide a test signal to the input pad unit. The display driver device operates in a normal mode or operates in the test mode based on a test mode signal.

Display driver device

A source driver circuit includes a receiver, a plurality of amplifying buffers, and a control logic circuit. The receiver receives a data signal and a control signal through an input terminal. Each of the amplifying buffers outputs a driving signal generated based on the image data signal through an output terminal. The control logic circuit controls the receiver and the plurality of amplifying buffers based on the control signal. When a power-down signal is provided to the receiver, the control logic circuit is to turn off at least one of the receiver and the plurality of amplifying buffers.

Source driver circuit and display device for reducing power consumed by non-display area of display panel

Source driver circuit, method of operating same, and display device for reducing power consumed by non-display area of display panel

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Seoul, South Korea

Chulho Choi