Samsung Electro-mechanics Co., Ltd.

Chul Hwan Yoon

Youn Suk Kim

Ki Joong Kim

Dae Seok Jang

Sung Jae Yoon

Ju Young Park

Jun Goo Won

Sang Wook Park

Joong Jin Nam

Seong Geun Kim

Shinichi Iizuka

Jae Hyouck Choi

Sang Hoon Ha

Jun Kyung Na

There is provided a dual communications network base station apparatus including: a first UTRA network transmitting and receiving first data including pairs information via a previously set first communications band; a second UTRA network transmitting and receiving second data including the pairs information via a second communications band different from the first communications band; a core network combining the first data and the second data by using the pairs information during wireless reception, dividing the first data and the second data including the pairs information according to a previously set division rate during wireless transmission, and providing the corresponding UTRA network with the divided first data and second data; and a server communicating data including the first and second data with the core network.

Dual communications network base station apparatus

Disclosed herein is a power amplifier for time division multiple access. The power amplifier for time division multiple access includes: power amplifiers power-amplifying input transmission signals and outputting the amplified signals; a power control unit using a time division multiple access type to control amplification of the power amplifiers; a switching unit formed at output terminals of the power amplifiers and the power control unit and outputting the amplified signals to an antenna based on a switching pass determined by the power control unit; and a timing control unit formed at an input terminal of the power control unit and determining turn-on time of a second signal by a level of an output signal generated by comparing a first signal with reference voltage.

Power amplifier for time division multiple access

There are provided a dual mode communications device and a method of improving a data rate thereof. The dual mode communications device according to the embodiment of the present invention may include a selection unitconnecting antenna terminals to receive terminals or transmit terminals, a receive path circuit unit allowing RF receive signals from each of the first and second antennas to pass therethrough, a transmit path circuit unit providing RF transmit signals to the transmit terminals of the selection unit, an RF circuit unit converting the RF receive signals from the receive path circuit unit into baseband signals and converting the baseband signals to be transmitted into the RF transmit signals, and a baseband circuit unit performing control and signal processing of the selection unit in a single communications mode among a dual mode and a single mode.

Dual mode communications device and method of improving data rate thereof

A transformer having a structure in which first and second substrates are vertically laminated, including: a plurality of input conductive lines disposed on the first substrate along a circumference thereof; a single output conductive line disposed co-planarly with the plurality of input conductive lines, and having one end connected to a ground; and an air bridge including a pair of conductive via holes formed in any one conductive line in an overlapped area in which the input and output conductive lines are intersected with each other to penetrate through the first substrate and a single piece of conductive line connecting the pair of conductive via holes to each other and disposed on the second substrate, thereby preventing a short-circuit between the input and output conductive lines.

Transformer

A power control system includes a power regulator having a plurality of power PMOS transistors connected to a power source in parallel and configured to supply current and voltage controlled according to an input lamp voltage, a current sensing unit connected to the power source and configured to sense currents flowing through a plurality of target PMOS transistors located at predetermined positions among the PMOS transistors, a current mirror unit connected to a first regulated voltage terminal and configured to generate a plurality of currents equal to the sensed currents, a comparator unit configured to total the generated currents to convert the totaled currents into a voltage, and to generate a voltage difference between the voltage and a predetermined reference voltage, and a current bias circuit unit connected to a second regulated voltage terminal and configured to control a bias current according to the generated voltage difference.

Power control system and power amplification system using the same

A CMOS power amplifier includes: a first MOS transistor connected between a first power terminal and a first output stage and having a gate connected to an input stage; a second MOS transistor connected between the first output stage and a ground and having a gate connected to the input stage; a switching circuit unit connecting or separating a feedback line between the input stage and the first output stage to select a linear amplifying operation or a non-linear amplifying operation; and a resistor formed at the feedback line between the input stage and the first output stage to determine a linear amplification gain when the feedback line is turned on.

Growing community of inventors

Gyunggi-do, South Korea

Chul Hwan Yoon