Electronics and Telecommunications Research Institute

Chul-Ho Won

Seong-Woon Kim

Suk-Han Yoon

A memory data path controller for a large-scale parallel processing computer system in which, when a network interface and bus interface request access to a single-port memory, a dual path controller dividedly stores memory access requests in network queue and bus queue. This allows a single-port DRAM to be used as a dual-port memory device. Further, the network queue and bus queue are multi-staged to store sequential memory requests and transmit reading/writing data of the network queue or bus queue to the DRAM memory.

Growing community of inventors

Daejeon, South Korea

Chul-Ho Won