Renesas Technology Corp.

Renesas Electronics Corporation

Hitachi, Ltd.

Other

Rohm Co., Ltd.

Hitachi Cable, Inc.

Hitachi Ulsi Systems Co., Ltd.

Akita Electronics Systems Co., Ltd.

Chuichi Miyazaki

Kunihiro Tsubosaki

Asao Nishimura

Ichiro Anjoh

Yukiharu Akiyama

Tomoaki Kudaishi

Masanori Shibamoto

Hideki Tanaka

Kunihiko Nishi

Yoshiyuki Abe

Akio Hasebe

Ryosuke Kimoto

Akira Nagai

Masahiko Ogino

Shuji Eguchi

Tomoko Higashino

Toshihide Uematsu

Kazunari Suzuki

Hiroyoshi Kokaku

Masanori Segawa

Mamoru Mita

Norio Okabe

Hideo Mutou

Hiroshi Koyama

Toshihiro Shiotsuki

Takehiro Ohnishi

Noriou Shimada

Makoto Kitano

Ichiro Anjo

Nobutake Tsuyuno

Takashi Kikuchi

Makoto Morishima

Koichi Kanemoto

Rie Hattori

Haruo Shimamoto

Toshiak Ishii

Toshiaki Ishii

Takumi Ueno

Takashi Wada

Tadahiro Morifuji

Hideyuki Suga

Manabu Takata

Masnori Shibamoto

Minoru Kimura

Masao Odagiri

Yasuhiro Naka

Noriyuki Takahashi

Naotaka Tanaka

Hiroshi Honma

Hitoshi Odashima

Seiichi Ichihara

Yasuyuki Nakajima

Noriyuki Ooroku

Hideyuki Sakaizawa

Toru Mita

Kenji Kohzu

Kosuke Kitaichi

Shinya Ogane

Makoto Kurihara

To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width direction of the cutting region, and a laser beam for forming a modified region is irradiated to a position away in plane from the test pad and the alignment target Am. In this manner, defects in cutting shape in a cutting process of a semiconductor wafer using stealth dicing can be reduced or prevented.

Semiconductor device manufacturing method and semiconductor device

A semiconductor wafer with modified regions formed in the substrate is provided. A modified region is formed apart from the side of a wafer and a pad is formed over an insulating film, which is formed over the main surface of the substrate of the wafer. Further, the modified region is formed closer to the side surface of the substrate than the pad. In this manner, defects in cutting shape in a cutting process of a semiconductor wafer using stealth dicing can be reduced or prevented.

Semiconductor chip with modified regions for dividing the chip

Grooves are formed on the front surfaces of first and second semiconductor wafers each including an aggregate of a plurality of semiconductor chips. The grooves each extend on a dicing line set between the semiconductor chips and to have a larger width than the dicing line. Thereafter the first and second semiconductor wafers are arranged so that the front surfaces thereof are opposed to each other, and the space between the first semiconductor wafer and the second semiconductor wafer is sealed with underfill. Thereafter the rear surfaces of the first and second semiconductor wafers are polished until at least the grooves are exposed, and a structure including the first and second semiconductor wafers and the underfill is cut on the dicing line.

Method of manufacturing semiconductor device, semiconductor device and multilayer wafer structure

Semiconductor device manufacturing method using laser irradiation and dicing saw and semiconductor device thereof

A method includes the steps of: (a) fixing a front surface of a wafer (semiconductor wafer) having the front surface, a plurality of chip regions formed on the front surface, a dicing region formed between the chip regions, and a rear surface opposite to the front surface to the supporting member; (b) in a state of having the wafer fixed to the supporting member, grinding the rear surface of the wafer to expose the rear surface; (c) in a state of having the wafer fixed to the supporting member, dividing the wafer into the chip regions; (d) etching side surfaces of the chip regions to remove crushed layers formed in the step (c) on the side surfaces and obtain a plurality of semiconductor chips. After the steps (e) and (d), the plurality of divided chip regions are peeled off from the supporting member to obtain a plurality of semiconductor chips.

Method of manufacturing semiconductor device

The reliability of the semiconductor device which has the structure which stores a plurality of semiconductor chips with which plane sizes differ in the same sealing body in the state where they are accumulated via the insulating film which has adhesive property is improved. In the semiconductor device which has the structure which stores a plurality of semiconductor chips with which plane sizes differ in the same sealing body in the state where they are accumulated via DAF, thickness of DAF of the back surface of the uppermost semiconductor chip with which the control circuit was formed was made thicker than each of DAF of the back surface of the lower layer semiconductor chip with which the memory circuit was formed. Hereby, the defect that the bonding wire which connects the uppermost semiconductor chip and a wiring substrate contacts the main surface corner part of a lower layer semiconductor chip can be reduced.

In a state where an adhesive tape is attached onto a main surface of a semiconductor wafer, a trench is formed in a rear surface of the semiconductor wafer. For forming the trench in the rear surface of the semiconductor wafer, after coating a resist film on the rear surface of the semiconductor wafer, the resist film is patterned by using the photolithography technology. The patterning of the resist film is performed so as not to leave the resist film in the region where the trench is to be formed. Then, the trench is formed in a predetermined region of the semiconductor wafer by the dry etching technology using the patterned resist film as a mask. Specifically, the trench is formed in the region near the dicing line.

Semiconductor device, semiconductor wafer and manufacturing method of the same

Semiconductor device manufacturing method comprising a metal pattern and laser modified regions in a cutting region

In the semiconductor device which has the structure which stores a plurality of semiconductor chips with which plane sizes differ in the same sealing body in the state where they are accumulated via DAF, thickness of DAF of the back surface of the uppermost semiconductor chip with which the control circuit was formed was made thicker than each of DAF of the back surface of the lower layer semiconductor chip with which the memory circuit was formed. Hereby, the defect that the bonding wire which connects the uppermost semiconductor chip and a wiring substrate contacts the main surface corner part of a lower layer semiconductor chip can be reduced.

Semiconductor device

A semiconductor device which stores a plurality of semiconductor chips, having planar sizes which differ, in the same sealing body in a state in which they are accumulated via an insulating film which has an adhesive property. In the semiconductor device, the thickness of DAF of the back surface of the uppermost semiconductor chip with which the control circuit is formed is thicker than each of DAF of the back surface of the lower layer semiconductor chip with which the memory circuit is formed.

A technique capable of stably releasing chips from a dicing tape, includes grinding a back surface of a semiconductor wafer, while adhering a pressure sensitive adhesive tape to a circuit forming surface of the semiconductor wafer formed with an integrated circuit, to achieve a predetermined thickness and forcibly oxidizing the back surface of the semiconductor wafer. Then, the pressure sensitive adhesive tape adhered to the circuit forming surface of the semiconductor wafer is released, and a dicing tape is adhered to the back surface of the semiconductor wafer. Further, the semiconductor wafer is divided by dicing it into individual chips, and then the back surface of the chip is pressed by way of the dicing tape, thereby releasing the chips from the dicing tape.

Fabrication method of semiconductor integrated circuit device

In a stealth dicing process for a semiconductor device with a low dielectric constant layer, the occurrence of poor appearance such as a defective shape or discoloration in the layer is reduced or prevented as follows. A low dielectric constant layer is formed in an interlayer insulating layer formed on the main surface of a semiconductor wafer. A laser beam is focused on the inside of the wafer from the reverse side of the wafer in order to form modified regions selectively. Each modified region is formed in a way to contact, or partially get into, the low dielectric constant layer. In this formation process, the semiconductor wafer is cooled by a cooling element. This reduces or prevents discoloration of the low dielectric constant layer which might occur due to the heat of a laser beam.

Semiconductor manufacturing method

The semiconductor device having the structure which laminated the chip in many stages is made thin. A reforming area is formed by irradiating a laser beam, where a condensing point is put together with the inside of the semiconductor substrate of a semiconductor wafer. Then, after applying the binding material of liquid state to the back surface of a semiconductor wafer by a spin coating method, this is dried and a solid-like adhesive layer is formed. Then, a semiconductor wafer is divided into each semiconductor chip by making the above-mentioned reforming area into a division origin. By pasting up this semiconductor chip on the main surface of an other semiconductor chip by the adhesive layer of the back surface, the semiconductor device having the structure for which the semiconductor chip was laminated by many stages is manufactured.

Semiconductor device and a manufacturing method of the same

Growing community of inventors

Akishima, Japan

Chuichi Miyazaki