Chartered Semiconductor Manufacturing Ltd (corporation)

Chuck Jang

Narayanan Balasubramanian

Peter Chew

Ching Win Kong

A method for forming within an integrated circuit a low impurity diffusion polysilicon layer. Formed upon a semiconductor substrate is an amorphous silicon layer. Formed also upon the semiconductor substrate and contacting the amorphous silicon layer is a polysilicon layer. The amorphous silicon layer and the polysilicon layer are then simultaneously annealed to form a low impurity diffusion polysilicon layer. The low impurity diffusion polysilicon layer is a polysilicon multi-layer with grain boundary mis-matched polycrystalline properties. Optionally, a metal silicide layer may be formed upon the amorphous silicon layer and the polysilicon layer either prior to or subsequent to annealing the amorphous silicon layer and the polysilicon layer. The metal silicide layer and low impurity diffusion polysilicon layer may then be patterned to form a polycide gate electrode.

Method for forming a low impurity diffusion polysilicon layer

A method for selectively depositing WSi.sub.x is described. Semiconductor device structures are provided in and on a semiconductor substrate wherein WSi.sub.x is to be deposited overlying a first portion of the substrate and wherein WSi.sub.x is not to be deposited overlying a second portion of the substrate. A layer of organic material is provided over the surface of the substrate overlying the second portion of the substrate. A layer of WSi.sub.x is deposited over the surface of the substrate wherein the WSi.sub.x is deposited overlying the first portion of the substrate and wherein the presence of the organic material layer prevents the WSi.sub.x from depositing overlying the second portion of the substrate completing the selective WSi.sub.x deposition in the fabrication of an integrated circuit device.

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Singapore, Singapore

Chuck Jang