E Ink Holdings Inc.

Chuang-Chuang Tsai

Hsiao-Wen Zan

Wei-Tsung Chen

Ted-Hong Shinn

Hsin-Tao Huang

Chih-Hsiang Yang

Zong-Xuan Li

Hung-Chuan Liu

Wen-Chung Tang

Cheng-Hang Hsu

Chia-Chun Yeh

Xue-Hung Tsai

Chao-Hsuan Chen

Pei-Chen Yu

Ching-Fu Lin

Chun-Cheng Yeh

Hsin Chiao

Henry Wang

Hsin-Fei Meng

Chun-Hung Liao

Ming-Yen Chuang

Yu-Nung Mao

Po-Yi Chang

Yi-Ting Chou

Chun-Chih Chen

Chia-Wei Chou

Bing-Shu Wu

Yi-Chun Lai

Liang-Hao Chen

A sensitive device includes a plurality of first conductive nanostructures, a conductive layer and at least one electrode. The conductive layer covers the first conductive nanostructures. An intrinsic melting point of the conductive layer is higher than that of the first conductive nanostructures. At least one of the conductive layer and the first conductive nanostructures is sensitive to gas. The electrode is electrically connected to at least one of the first conductive nanostructures and the conductive layer.

Sensitive device and method of forming the same

A proximity sensor includes a substrate, a light source, a finger electrode, an active layer, and a transparent electrode layer. The substrate has opposite top and bottom surfaces. The light source faces toward the bottom surface of the substrate. The finger electrode is located on the top surface of the substrate, and has finger portions and gaps between every two adjacent finger portions. The active layer covers the finger electrode, and is located in the gaps. The transparent electrode layer is located on the active layer. When the light source emits light, the light through the gaps sequentially passes through the active layer and the transparent electrode layer onto a reflective surface. The light is reflected by the reflective surface to form reflected light, and the reflected light passes through the transparent electrode layer and is received by the active layer.

Proximity sensor and operation method thereof

An active device is disposed on a substrate and includes a gate, an organic active layer, a gate insulation layer, a plurality of crystal induced structures, a source and a drain. The gate insulation layer is disposed between the gate and the organic active layer. The crystal induced structures distribute in the organic active layer and directly contact with the substrate or the gate insulation layer. The source and the drain are disposed on two opposite sides of the organic active layer, wherein a portion of the organic active layer is exposed between the source and the drain.

Active device

A memory structure includes a substrate, a gate electrode, a first isolation layer, a thin metal layer, indium gallium zinc oxide (IGZO) particles, a second isolation layer, an IGZO channel layer, and a source/drain electrode. The gate electrode is located on the substrate. The first isolation layer is located on the gate electrode. The thin metal layer is located on the first isolation layer, and has metal particles. The IGZO particles are located on the metal particles. The second isolation layer is located on the IGZO particles. The IGZO channel layer is located on the second isolation layer. The source/drain electrode is located on the IGZO channel layer.

Memory structure and manufacturing method thereof

A sensing element includes a conductive substrate, a zinc oxide seed layer, a plurality of zinc oxide nanorods, a film with an electrical double layer, and an organic sensing layer. The zinc oxide seed layer is located on the conductive substrate. The zinc oxide nanorods extend from the zinc oxide seed layer. The film with the electrical double layer covers the zinc oxide nanorods. The organic sensing layer is located on the film with the electrical double layer.

Sensing element

A transistor including a substrate, a source, a drain, an active portion, a fin-shaped gate, and an insulation layer is provided. The source is located on the substrate. The drain is located on the substrate. The active portion connects the source and the drain. The fin-shaped gate wraps the active portion. A first portion of the insulation layer separates the fin-shaped gate from the active portion, a second portion of the insulation layer separates the fin-shaped gate from the substrate, a third portion of the insulation layer separates the fin-shaped gate from the source and from the drain, and a fourth portion of the insulation layer is located on a surface of the fin-shaped gate facing away from the active portion. Here, the insulation layer is integrally formed.

Transistor

An organic thin film transistor includes a substrate, a hydrophobic layer, an oxide layer, a hydrophilic layer, a semiconductor layer, and a source/drain layer. The hydrophobic layer covers a surface of the substrate. The oxide layer is located on the hydrophobic layer and has plural segments. The hydrophilic layer is located on the segments of the oxide layer, and the oxide layer is located between the hydrophilic layer and the hydrophobic layer. The semiconductor layer is located on the hydrophilic layer, and the hydrophilic layer is located between the semiconductor layer and the oxide layer. The source/drain layer connects across the semiconductor layer on the segments of the oxide layer.

Organic thin film transistor and manufacturing method thereof

A transistor including a substrate, a gate layer, a first insulating layer, an active layer, a source and a drain is provided. The gate layer is disposed on the first insulating layer, and has a plurality of first through holes. The first insulating layer covers the gate layer and a part of the substrate exposed by the first through holes, and forms a plurality of recesses respectively corresponding to the first through holes. The active layer is disposed on the first insulating layer, and has a plurality of second through holes. The second through holes communicate with the recesses, respectively. The source is disposed on a part of the active layer. The drain is disposed on another part of the active layer. A manufacturing method of the transistor is also provided.

Transistor including active layer having through holes and manufacturing method thereof

A manufacturing method of a transistor is provided, and the method includes: providing a base; forming a fin-shaped gate on the base; covering the fin-shaped gate with an insulation layer; providing a substrate; forming a partially cured sol-gel on the substrate; inserting the fin-shaped gate into the partially cured sol-gel, so that a portion of the fin-shaped gate is uncovered by the partially cured sol-gel; after inserting the fin-shaped gate into the partially cured sol-gel, curing the partially cured sol-gel; and processing a portion of the partially cured sol-gel not overlapping with the fin-shaped gate to increase conductivity of the portion of the partially cured sol-gel.

Manufacturing method of a transistor

A display device includes a reflective cover, a light guide plate, and a display device. The reflective cover has an opening confined by a top inner surface, at least one side inner surface, and a bottom inner surface of the reflective cover. The light guide plate has a top surface, a bottom surface, and a side face connected to the top surface and the bottom surface, a part of the top surface is covered by the top inner surface of the reflective cover. The display device is placed under the light guide plate and a partial surface of the display device is covered by the bottom inner surface of the reflective cover. The reflective cover bonds the light guide plate and the display device together.

Display device

A semiconductor sensing device that includes a nanowire conductive layer, a semiconductor sensing layer, and a conductive layer is provided. The nanowire conductive layer includes a plurality of connected conductive nanowires, and gaps are formed between the conductive nanowires. The semiconductor sensing layer is electrically connected to the nanowire conductive layer. The conductive layer is electrically connected to the semiconductor sensing layer. The semiconductor sensing layer is located between the nanowire conductive layer and the conductive layer. A manufacturing method of a semiconductor sensing device is also provided.

Semiconductor sensing device comprising conductive nanowires and manufacturing method thereof

A metal oxide semiconductor transistor includes a gate, a metal oxide active layer, a gate insulating layer, a source, and a drain. The metal oxide active layer has a first surface and a second surface, and the first surface faces to the gate. The gate insulating layer is disposed between the gate and the metal oxide active layer. The source and the drain are respectively connected to the metal oxide active layer. The second surface defines a mobility enhancing region between the source and the drain. An oxygen content of the metal oxide active layer in the mobility enhancing region is less than an oxygen content of the metal oxide active layer in the region outside the mobility enhancing region. The metal oxide semiconductor transistor has high carrier mobility.

Metal oxide semiconductor transistor

A semiconductor structure includes a top gate, an oxide semiconductor channel layer, a first dielectric layer, a second dielectric layer, a source and a drain. The oxide semiconductor channel layer is disposed between the top gate and a substrate. The first dielectric layer is disposed between the top gate and the oxide semiconductor channel layer. The second dielectric layer is disposed between the first dielectric layer and the oxide semiconductor channel layer. The source and the drain are disposed on two opposite sides of the oxide semiconductor channel layer and located between the first dielectric layer and the substrate. A portion of the oxide semiconductor channel layer is exposed between the source and the drain. A portion of the first dielectric layer and a portion of the second dielectric layer directly contact with and entirely cover the portion of the oxide semiconductor channel layer.

Semiconductor structure

A thin film transistor (TFT) including a gate, a dielectric layer, a metal-oxide semiconductor channel, a source, and a drain is provided. The gate and the metal-oxide semiconductor channel are overlapped. The gate, the source, and the drain are separated by the dielectric layer. Besides, the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel. The metal-oxide semiconductor channel includes a metal-oxide semiconductor layer and a plurality of nano micro structures disposed in the metal-oxide semiconductor layer and separated from one another. In another aspect, a display panel including the TFT and a method of fabricating the TFT are also provided.

Display panel, thin film transistor and method of fabricating the same

A capacitor structure of capacitive touch panel including a first electrode layer, a first material layer, a second material layer and a second electrode layer is provided. The first material layer is disposed on the first electrode layer, and the material of the first material layer is selected from one of a semiconductor material and an insulating material. The second material layer is disposed on the first material layer, and the material of the second material layer is selected from another one of the semiconductor material and the insulating material. The second electrode layer is disposed on the second material layer.

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Hsinchu, Taiwan

Chuang-Chuang Tsai