United Microelectronics Corp.

Chuan Fu Wang

Tzyh-Cheang Lee

Shui-Chin Huang

Sung-Bin Lin

Nai-Chen Peng

The single-poly EEPROM includes a first PMOS transistor serially connected to a second PMOS transistor. The first and second PMOS transistors are both formed on an N-well of a P type substrate. The first PMOS transistor includes a floating gate, a first Pdoped drain region and a first Pdoped source region. The second PMOS transistor includes a gate and a second Pdoped source region. The first Pdoped drain region of the first PMOS transistor serves as a drain of the second PMOS transistor. A diode is located in the P type substrate including a P-well and a Ndoped region. The floating gate overlaps with the N-well and extends to the Ndoped region. The overlapped region of the P-well and the Ndoped region junction beneath the floating gate serves as an avalanche injection point in the vicinity of the first PMOS transistor.

Growing community of inventors

Miao-Li County, Taiwan

Chuan Fu Wang