Taiwan Semiconductor Manufacturing Comp. Ltd.

Chu-Ping James Wang

Yung-Chin Hou

Li-Chun Tien

Lee-Chung Lu

Yi-Kan Cheng

Chen-Lin Yang

George H Chang

Chen-Teng Fan

This invention discloses a method for sanity checking integrated circuit (IC) designs based on one or more predefined sub-circuits with at least one predefined checking criteria, the method comprising automatically reading one or more netlists, identifying one or more sub-circuits in the netlists isomorphic to at least one of predefined sub-circuits, identifying one or more device parameters for sanity checking the identified sub-circuits, and comparing the identified device parameters against the predefined checking criteria.

Sanity checker for integrated circuits

A semiconductor structure including at least one spare cell is disclosed. The semiconductor structure includes a first conductive line coupled to a power supply, and a second conductive line coupled to a complementary power supply. At least one spare cell is decoupled from the first or second conductive line for being selectively connected to at least one normally functioning electronic components, the first conductive line and the second conductive line only during a rerouting process for reducing leakage power of the semiconductor structure.

ECO cell for reducing leakage power

Growing community of inventors

Hsinchu, Taiwan

Chu-Ping James Wang