Sandisk 3D LLC

Sandisk Technologies Inc.

Chu-Chen Fu

Franz Kreupl

Christopher John Petti

Peter Rabkin

Wipul Jayasekara

Yangyin Chen

Jingyan Zhang

Yoichiro Tanaka

Deepak Chandra Sekar

Raghuveer S Makala

Er-Xuan Ping

James K Kai

Tanmay Kumar

George Samachisa

Tong Zhang

Jordan Asher Katine

Yung-Tin Chen

Federico Nardi

Lei Wan

Abhijit Bandyopadhyay

Tsai-Wei Wu

Yubao Li

Timothy James Minvielle

Yibo Nian

Huiwan Xu

A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.

Cross-point magnetoresistive random memory array and method of making thereof using self-aligned patterning

First electrically conductive lines can be formed over a substrate. A two-dimensional array of vertical stacks can be formed, each of which includes a first electrode, an in-process resistive memory material portion, and a second electrode over the first electrically conductive line. The sidewalls of the in-process resistive memory material portions are laterally recessed with respect to sidewalls of the first electrode and the second electrode to form resistive memory material portions having reduced lateral dimensions. A dielectric material layer is formed by an anisotropic deposition to form annular cavities that laterally surround a respective one of the resistive memory material portions. Second electrically conductive lines can be formed on the second electrodes.

Resistive memory device including a lateral air gap around a memory element and method of making thereof

Systems and methods for improving performance of a non-volatile memory that utilizes a Vacancy Modulated Conductive Oxide (VMCO) structure are described. The VMCO structure may include a layer of amorphous silicon (e.g., a Si barrier layer) and a layer titanium oxide (e.g., a TiO2 switching layer). In some cases, the VMCO structure or VMCO stack may use bulk switching or switching O-ion movements across an area of the VMCO structure, as opposed to switching locally in a constriction of vacancy formed filamentary path. A VMCO structure may be partially or fully embedded within a word line layer of a memory array.

Implementation of VMCO area switching cell to VBL architecture

A fabrication process for a resistance-switching memory cell uses metal oxide as a resistance-switching material. A metal oxide film having an initial stoichiometry is deposited on an electrode using atomic layer deposition. A changed stoichiometry is provided for a portion of the metal oxide film using a plasma reduction process, separate from the atomic layer deposition, and another electrode is formed adjacent to the changed stoichiometry portion. The film deposition and the plasma reduction can be performed in separate chambers where conditions such as temperature are optimized. The metal oxide film may be deposited on a vertical sidewall in a vertical bit linememory device. Optionally, the mean free path of hydrogen ions during the plasma reduction process is adjusted to increase the uniformity of the vertical metal oxide film. The adjustment can involve factors such as RF power, pressure and a bias of the wafer.

Plasma reduction method for modifying metal oxide stoichiometry in ReRAM

Non-volatile storage elements having a reversible resistivity-switching element and techniques for fabricating the same are disclosed herein. The reversible resistivity-switching element may be formed by depositing an oxygen diffusion resistant material (e.g., heavily doped Si, W, WN) over the top electrode. A trap passivation material (e.g., fluorine, nitrogen, hydrogen, deuterium) may be incorporated into one or more of the bottom electrode, a metal oxide region, or the top electrode of the reversible resistivity-switching element. One embodiment includes a reversible resistivity-switching element having a bi-layer capping layer between the metal oxide and the top electrode. Fabricating the device may include depositing (un-reacted) titanium and depositing titanium oxide in situ without air break. One embodiment includes incorporating titanium into the metal oxide of the reversible resistivity-switching element. The titanium might be implanted into the metal oxide while depositing the metal oxide, or after deposition of the metal oxide.

Non-volatile storage with metal oxide switching element and methods for fabricating the same

A method of forming a reversible resistance-switching metal-insulator-metal structure is provided, the method including forming a first non-metallic conducting layer, forming a non-conducting layer above the first non-metallic conducting layer, forming a second non-metallic conducting layer above the non-conducting layer, etching the first non-metallic conducting layer, non-conducting layer and second non-metallic conducting layer to form a pillar, and disposing a carbon material layer about a sidewall of the pillar. Other aspects are also provided.

Methods of forming a reversible resistance-switching metal-insulator-metal structure

A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has first and second resistance-switching layers on either side of a conductive intermediate layer, and first and second electrodes at either end of the RSME. The first and second resistance-switching layers can both have a bipolar or unipolar switching characteristic. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided.

Composition of memory cell with resistance-switching layers

A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has a resistance-switching layer, a conductive intermediate layer, and first and second electrodes at either end of the RSME. A breakdown layer is electrically between, and in series with, the second electrode and the intermediate layer. The breakdown layer maintains a resistance of at least about 1-10 M&#x3a9; while in a conductive state. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided.

Memory cell with resistance-switching layers including breakdown layer

A nonvolatile memory cell includes a storage element, the storage element comprising a carbon material, a steering element located in series with the storage element, and a metal silicide layer located adjacent to the carbon material. A method of making a device includes forming a metal silicide over a silicon layer, forming a carbon layer over the metal silicide layer, forming a barrier layer over the carbon layer, and patterning the carbon layer, the metal silicide layer, and the silicon layer to form an array of pillars.

Nonvolatile memory cell including carbon storage element formed on a silicide layer

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San Ramon, CA, United States of America

Chu-Chen Fu