S.o.i.tec Silicon on Insulator Technologies

Commissariat a L'energie Atomique

Soitec

Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

S.o.i. Tec Silicon on Insulator Technologies, S.a.

Tracit Technologies

S.o.i. Tec Silicon on Insulator Technologies of Chemin Des Franques

Chrystelle Lagahe-Blanchard

Bernard Aspar

Hubert Moriceau

Olivier Rayssac

Thierry Barge

Marc Zussy

Muriel Martinez

Alain Soubie

Cécile Berne

Michel Bruel

Aurélie Tauzin

A method for trimming a structure obtained by bonding a first wafer to a second waver on contact faces and thinning the first waver, wherein at least either the first wafer or the second wafer is chamfered and thus exposes the edge of the contact face of the first wafer, wherein the trimming concerns the first wafer. The method includes a) selecting the second wafer from among wafers with a resistance to a chemical etching planned in b) that is sufficient with respect to the first wafer to allow b) to be carried out; b) after bonding the first wafer to the second wafer, chemical etching the edge of the first wafer to form in the first wafer a pedestal resting entirely on the contact face of the second wafer and supporting the remaining of the first wafer; and c) thinning the first wafer until the pedestal is reached and attacked, to provide a thinned part of the first wafer.

Method for trimming a structure obtained by the assembly of two plates

This invention provides composite semiconductor substrates and methods for fabricating such substrates. The composite structures include a semiconductor substrate, a semiconductor superstrate and an intermediate layer interposed between the substrate and the superstrate that comprises a material that undergoes a structural transformation when subject to a suitable heat treatment. The methods provide such a heat treatment so that the intermediate layer becomes spongy or porous, being filled with numerous micro-bubbles or micro-cavities containing a gaseous phase. The composite semiconductor substrates with structurally-transformed intermediate layers have numerous applications.

Methods of making substrate structures having a weakened intermediate layer

The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises:

Method for producing partial SOI structures comprising zones connecting a superficial layer and a substrate

The invention concerns a method for forming a growth mask on the surface of an initial crystalline substrate, comprising the following steps: the method being characterized in that the formation of the pattern is obtained by ion implantation carried out in the surface layer of the initial substrate underlying the layer of second material, the implantation conditions being such that they cause, directly or after a heat treatment, on said face of the initial substrate, the appearance of exfoliated zones of first material leading to the localized removal of the zones of second material covering the exfoliated zones of first material, thereby locally exposing the initial substrate and forming growth windows on the initial substrate. The invention further concerns methods for forming a crystalline thin film and transferring this thin film onto a host substrate.

Method for forming a detachable substrate including implantation and exfoliation

The invention concerns a method for preparing a thin layer () or a chip to be transferred onto another substrate, this method including the realization, above the surface of said thin layer or said chip, of at least one layer, called adhesive layer (), and of at least one layer, called first barrier layer (), the adhesive layer being made of a material of which etching presents selectivity in relation to the material of the barrier layer.

Method for transferring wafers

An automatic high-precision layer cutting device for separating a layer from a semiconductor substrate. The device includes a fixed positioning member for receiving at least a portion of a semiconductor substrate that has a weakened area therein and a peripheral annular notch located below the weakened area. The positioning member maintains the position of the substrate on a moveable support. A cutting mechanism having at least one blade is provided for contacting the substrate and inducing a cleaving wave therein. The cutting mechanism is operatively associated with the positioning member so that the as at least one blade contacts the annular notch, the positioning member prevents movement of the substrate and the moveable support moves away from the substrate to allow the cleaving wave to both divide the substrate at the notch into first and second parts and detach the layer from the substrate along the weakened area.

Substrate layer cutting device and method

An automatic high-precision layer cutting device for separating a layer from a semiconductor substrate. The cutting device includes a fixed positioning member for receiving at least a portion of a semiconductor substrate that has a weakened area therein and a peripheral annular notch that is located below the weakened area. The positioning member maintains a predetermined position of the substrate on a support. The device also includes cutting means having at least one blade for contacting the substrate and for inducing a cleaving wave into the substrate. The cutting means is operatively associated with the positioning member so that the at least one blade contacts the annular notch and the positioning member prevents movement of the substrate. The at least one blade induces a cleaving wave of sufficient intensity to both divide the substrate at the notch into first and second parts and detach the layer from the substrate along the weakened area.

Growing community of inventors

St. Joseph de Riviere, France

Chrystelle Lagahe-Blanchard