International Business Machines Corporation

Microsoft Technology Licensing, LLC

Christos J Georgiou

Valentina Salapura

Thor A Larsen

Peter Anthony Franaszek

Victor L Gregurick

Peter Anthony Sandon

Richard Eugene Anderson

Edward Scott Kirkpatrick

Chung-Sheng Li

Robert Michael Bunce

Indira Nair

Ki W Lee

Christos Dimitrios Dimitrakopoulos

Monty Montague Denneau

Ting D Cheng

Anujan M Varma

Clifford A Pickover

Alfred Grill

Eugen Schenfeld

Gregory Michael Nordstrom

David Frederick Bantz

Jeffrey Owen Kephart

Howard Thomas Olnowich

David Michael Chess

George Wayne Nation

Daniel Arthur Prener

Joseph M Mosley

Kiyoshi Maruyama

Gerald Lebizay

Marc Raymond Faucher

Ulisses Mello

Martin W Sachs

Brian Joel Schuh

Lurng-Kuo Liu

Robert Francis Lusch

Yeong-Chang L Lien

Bernice E Rogowitz

Louis T Fasano

Kevin G Kramer

Ann Marie Rincon

Yitzhak Dishon

Thomas M Walker

Thomas K Philips

Randall A Cieslak

Shien-Tai Pan

Anujan Mangala Varma

Anders P Ravn

Christo Dimitrios Dimitrakopoulos

The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area.

VLSI hot-spot minimization using nanotubes

A single chip protocol converter integrated circuit (IC) capable of receiving packets generating according to a first protocol type and processing said packets to implement protocol conversion and generating converted packets of a second protocol type for output thereof, the process of protocol conversion being performed entirely within the single integrated circuit chip. The single chip protocol converter can be further implemented as a macro core in a system-on-chip (SoC) implementation, wherein the process of protocol conversion is contained within a SoC protocol conversion macro core without requiring the processing resources of a host system. The single chip protocol converter integrated circuit and SoC protocol conversion macro implementation include multiprocessing capability including processor devices that are configurable to adapt and modify the operating functionality of the chip.

Single chip protocol converter

A method for disposal of desalination concentrated brine waste product from a desalination process provides that the desalination concentrated brine waste product is injected, along with a carbon dioxide waste product, typically into an imperviously capped porous rock formation, typically including a saline aquifer. The desalination concentrated brine waste product and the carbon dioxide waste product (i.e., which may be injected as a supercritical liquid) may be injected simultaneously or sequentially. The method provides for environmentally acceptable disposal of the desalination concentrated brine waste product and the carbon dioxide waste product.

Co-disposal and co-storage of desalination concentrated brine waste product and carbon dioxide waste product

The invention provides a method, system, and program product for managing a connection. In particular, the invention manages connection information in memory based on an expected usage of the corresponding connection. Connection information can be stored in faster memory, such as cache memory, when the connection is expected to have numerous additional messages. Similarly, the connection information for a connection not expected to have many additional messages can be swapped out of the cache memory and stored in relatively slower memory. As a result, the connection information that is more frequently used is more likely to be available in a faster memory.

Connection management method, system, and program product

Method of generating cyclic redundancy checks (CRCs) for a message with N data blocks. The method includes calculating a partial CRC for an out of order data block and storing the result, generating, using a division operation, a CRC remainder multiplier associated with the out of order data block and storing the result, repeating the calculating and generating steps until all N data blocks for the message are received, and combining the results of the calculating step and the generating step.

Method of computing partial CRCs

An electronic device comprises a die with at least one defined hot-spot area; and at least one defined intermediate temperature area at a temperature lower than the temperature of the hot-spot area. The device also comprises a cooling structure comprising at least one bundle of first nanotubes for cooling the hot spot area and at least one bundle of additional nanotubes for cooling the intermediate temperature area, and having heat conductivity lower than the bundle of first nanotubes. The heat conductivity of both sets of the nanotubes is sufficient to decrease any temperature gradient between the defined hot spot area, the defined intermediate temperature area, and at least one lower temperature area on the die. The walls of the first nanotubes and the additional nanotubes are surrounded by a heat conducting matrix material operatively associated with the lower temperature area.

On-chip temperature gradient minimization using carbon nanotube cooling structures with variable cooling capacity

A single chip protocol converter integrated circuit (IC) capable of receiving packets generating according to a first protocol type and processing said packets to implement protocol conversion and generating converted packets of a second protocol type for output thereof, the process of protocol conversion being performed entirely within the single integrated circuit chip. The single chip protocol converter can be further implemented as a macro core in a system-on-chip (SoC) implementation, wherein the process of protocol conversion is contained within a SoC protocol conversion macro core without requiring the processing resources of a host system. Packet conversion may additionally entail converting packets generated according to a first protocol version level and processing the said packets to implement protocol conversion for generating converted packets according to a second protocol version level, but within the same protocol family type. The single chip protocol converter integrated circuit and SoC protocol conversion macro implementation include multiprocessing capability including processor devices that are configurable to adapt and modify the operating functionality of the chip.

Apparatus and method of generating cyclic redundancy checks (CRCs) for a message with N data blocks. The method includes calculating a partial CRC for an out of order data block and storing the result, generating, using a division operation, a CRC remainder multiplier associated with the out of order data block and storing the result, repeating the calculating and generating steps until all N data blocks for the message are received; and combining the results of the calculating step and the generating step.

Method of computing partial CRCS

A method and system is provided to efficiently order packets received over a network. The method detects breaks in sequences for one or more packet flows by detecting out-of-sequence packets and enters the segment of sequential packets into a separate memory area, such as a linked list, for a particular flow. A transmission queue and reorder table is used to record the beginning sequence number for each segment. The transmission queue is consulted to locate the segment beginning with the lowest packet sequence number for a flow. The packets associated with the segment are transmitted in order. The transmission queue is then repeatedly searched for the next lowest packet sequence number for transmission of the associated packet chain until the transmission queue is emptied.

Method and system of efficient packet reordering

A System-on-Chip (SoC) component comprising a single independent multiprocessor subsystem core including a plurality of multiple processors, each multiple processor having a local memory associated therewith forming a processor cluster; and a switch fabric means connecting each processor cluster within an SoC integrated circuit (IC). The single SoC independent multiprocessor subsystem core is capable of performing multi-threading operation processing for SoC devices when configured as a DSP, coprocessor, Hybrid ASIC, or network processing arrangements. The switch fabric means additionally interconnects a SoC local system bus device with SoC processor components with the independent multiprocessor subsystem core.

System on chip IC with subsystem of multiple processing cores switch coupled to network protocol device and bus bridge to local system bus

The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area. The heat conductivity of the nanotubes is greater than the heat conductivity of the matrix material, with the distal ends of the nanotubes exposed to present a distal surface comprising the first heat conducting means for direct contact with a medium comprising a cooling fluid. The inventors also disclose processes for manufacturing and using the device and products produced by the processes.

An architecture that achieves high speed performance in a network protocol handler combines parallelism and pipelining in multiple programmable processors, along with specialized front-end logic at the network interface that handles time critical protocol operations. The multiple processors are interconnected via a high-speed interconnect, using a multi-token counter protocol for data transmission between processors and between processors and memory. Each processor's memory is globally accessible by other processors, and memory synchronization operations are used to obviate the need for 'spin-locks'. Each processor has multiple threads, each capable of fully executing programs. Threads within a processor are assigned the processing of various protocol functions in a parallel/pipelined fashion. Data frame processing is done by one or more of the threads to identify related frames. Related frames are dispatched to the same thread so as to minimize the overhead associated with memory accesses and general protocol processing.

Programmable network protocol handler architecture

A system and method for providing real-time, dynamic switching between first and second service providers each capable of providing a service for users over a communications network. The method includes steps of: establishing switching criterion for deciding when to switch service provision between the first service provider and second service provider; maintaining state information associated with a user's use of the service provided by a first service provider; switching between the first and second service provided over the communications network based on satisfaction of the switching criterion; and, migrating any state information maintained up to the time of switching to the second service. Preferably, the dynamic switching occurs in a manner substantially transparent to the user.

Method and system for on-demand allocation of a dynamic network of services

A system and method for delivering electronic messages automatically to transaction cards. The transaction cards are capable of rendering electronic messages from a server using a transaction activated connection. This system can be used to automatically deliver user specific information such as calendar, reminder, or e-mail information to a person scanning their card in, for example, a building where scanning a badge is required to enter the building. Alternatively, the system can be used to automatically deliver public information to a user such as advertisements to a render-capable transaction card which includes, for example, a calling card, a credit card, or a public transportation access card.

System and method for transaction card electronic messaging

Growing community of inventors

White Plains, NY, United States of America

Christos J Georgiou