Google Inc.

Christopher Thomas Kennelly

Milad Olia Hashemi

Akanksha Jain

Parthasarathy Ranganathan

Xinliang David Li

Hannah Lin

Carlos Villavieja Prados

Generally disclosed herein is an approach for dynamically modulating a hardware prefetcher using system software. The hardware prefetcher may be disabled when the amount of the memory bandwidth utilization level is above an upper threshold. The hardware prefetcher may be enabled when the amount of the memory bandwidth utilization level is below a lower threshold. To avoid constantly toggling the hardware prefetcher on and off and allow for smoother transitions, the amount of the memory bandwidth utilization level is observed until it stays above the upper threshold or below the lower threshold for a particular time before the system software changes the latest state of the hardware prefetcher.

Hardware control system to modulate prefetchers based on runtime telemetry

Generally disclosed herein is an approach for identifying target code locations for software prefetching instructions based on hardware prefetching information. The target code locations can be identified based on the locations where the hardware prefetchers were designed to prefetch loads. Hardware cache events related to processor events for different caches can be monitored for cache misses in a system running when hardware prefetchers are active and inactive. Code locations that may benefit from the use of the hardware prefetchers may be determined based on an ablation study. The identified code locations may be treated as recognized memory access patterns. Software prefetchers can be configured to use these memory access patterns for prefetching data while avoiding an extended time required to identify memory access patterns (i.e. a warm-up period) and fetching in locations where hardware prefetching is beneficial.

Hardware guided software prefetch insertion

The disclosed technology provides instructions to manipulate the state of a processor's cache. An application may send an instruction directly to the processor, providing it with information about memory allocation or deallocation events occurring within the application. This direct communication facilitates immediate synchronization between the application and the processor, ensuring accurate memory management.

Growing community of inventors

Croton-on-Hudson, NY, United States of America

Christopher Thomas Kennelly