Sony United Kingdom Limited

Sony Corporation

Other

Christopher Sleight

Peter Charles Eastty

Peter Damien Thorpe

James Andrew Scott Angus

Data processing apparatus comprises an array of user-operable controls, the controls being adjustable by movement of a user's hand while touching a control; a detector for detecting when a user's hand is touching a control; a display screen for displaying respective screen icons associated with the controls; and a display processor, responsive to a detection that a user's hand is touching one of the controls, for altering the screen icon associated with that control.

Data processing

An audio signal processor which modifies audio signal components outside the conventional audio frequency band. The processor includes a Delta Sigma Modulator (DSM) that receives a non-interpolated digital audio signal sampled at a frequency of at least 198 kHz.

Audio signal processors

Apparatus for storing or transmitting a one-bit digital signal comprises an input inverter for inverting a subset of the data bits of an input one-bit digital signal, to generate a bit-inverted signal; a storage or transmission medium for storing or transmitting the bit-inverted signal; and an output inverter for inverting the subset of the data bits of the bit-inverted signal, to regenerate the input one-bit digital signal.

Storage and transmission of one-bit data

A signal processor for 1-bit signals comprises a fifth order Delta-Sigma Modulator (DSM) having an input for receiving a 1-bit signal and an output at which a processed 1-bit signal is produced by a quantizer. The quantizer receives a p-bit signal from a series of five signal integration stages. Each stage comprises a first 1-bit multiplier coupled to the input, a second 1-bit multiplier coupled to the output, an adder which sums the outputs of the coefficient multipliers and an integrator which integrates the output of the adder. A final stage comprises a coefficient multiplier and an adder. The adder sums the output of the coefficient multiplier and the output of the integrator of the preceding integration stage. The coefficients are chosen to provide an overall attenuation of the input signal and of the quantization noise produced by the quantizer. Reduction of quantization noise allows several DSMs to be connected in series by preventing the build-up of excess noise, which may compromise stability.

Signal processors

A differential microphone ( ) produces a differential pair of output signals which are applied by a differential analogue amplifier ( ). The amplified differential signals are converted to 1-bit form by a pair of analogue to digital converters ( ) and are combined in a 1-bit Delta Sigma Modulator.

An array of user-operable controls and a proximity sensing apparatus are contained in an apparatus wherein the proximity sensing apparatus detects whether a user's hand is within a predetermined distance from the controls. Once the user's hand is a predetermined distance from the controls, a display screen displays screen icons associated with its respective control. The screen icons are controlled by a display processor which responsive to the user's hand being within a predetermined distance from the controls, alters the screen icon associated with its respective control.

Data processing apparatus utilizing proximity sensing to determine whether user's hand is within predetermined distance

A digital audio signal processor processes digital audio signals having a first sampling rate S1. The processor has a multiplicity of manually adjustable controls ( ) for setting desired parameters of signals to be processed. Sampling means ( ) sample each control ( ) setting at a second sampling rate S2 less than the first rate S1 to determine the settings thereof. Applying means ( ) responsive to the sampling means apply the sampled settings to the signals. For each control the applying means determines the difference of successive samples of setting and applies to the signal, subject to control by that control, increments of setting each increment being a predetermined fraction 1/n of the said difference at a rate nS2 which is n times the said second sampling rate S2.

Digital audio signal processors

An audio signal processor for processing 1-bit signals, comprises an input for receiving a 1-bit signal, means for applying a predetermined filter characteristic to the 1-bit signal whereby the signal is also converted to an n-bit signal where n is greater than one, means for determining the absolute value of the n-bit signal, means for producing a dynamics control signal dependent on the said absolute value, means for applying the dynamics control signal to the 1-bit input signal, and means for requantizing the dynamics controlled signal as a 1-bit signal and shaping the noise in the requantized 1-bit signal. Circuits for producing LOG base and the corresponding anti-log are also disclosed.

System for converting between non-logarithmic values and logarithmic values

Audio processing apparatus comprises an audio processor operable to apply audio processing operations to two or more input audio channels; user-operable adjustment controls for adjusting processing parameters associated with the audio processing operations; a display screen for displaying icons representing audio processing operations for each of the input audio channels, the display color of at least a part of an icon being defined by a logical color index; a data array mapping a set of logical color indices to colors for display on the display screen; and a detector for detecting user operation of the adjustment controls associated with an input audio channel and, in response to such a detection, for changing the display color of at least the part of the icon associated with that channel by changing the display color defined in the data array for the corresponding logical color index.

Audio processing system having user-operable controls

An audio signal processor for processing 1-bit signals, comprises an input,for receiving a 1-bit signal, means,for applying a predetermined filter characteristic to the 1-bit signal whereby the signal is also converted to an n-bit signal where n is greater than one, means 43 for determining the absolute value of the n-bit signal, means,for producing a dynamics control signal dependent on the said absolute value, means,for applying the dynamics control signal to the 1-bit input signal, and means,for requantizing the dynamics controlled signal as a 1-bit signal and shaping the noise in the requantised 1-bit signal. Circuits for producing LOG base,and the corresponding anti-log are also disclosed.

System for processing one-bit audio signals

A 1-bit nth order Delta Sigma Modulator where n is at least one comprises a linear signal processing section (,) which processes the 1-bit signal and produces a p bit output, a filter (,) which filters the p bit signal, an adder (,) a quantizer Q coupled to the output of the adder (,) to quantize a p bit signal to a 1-bit output signal, and a noise shaping section,which feeds the 1-bit output signal back to the adder

Signal processor delta-sigma modulator stage

Audio processing apparatus comprises an audio processor operable to apply one or more processing operations from a set of audio processing operations to an input audio signal; adjustment controls for adjusting processing parameters associated with each of the set of processing operations; a display screen for displaying icons representing each processing operation of the set of audio processing operations; and a detector for detecting user operation of the adjustment controls associated with an a processing operation and, in response to such a detection, for displacing the display position of the icon associated with that processing operation.

Audio processing

A 1-bit signal processor receives a 1-bit signal having a first sampling rate eg 64 fs. An upconverter (,) increases the sampling rate to eg 128 fs. A series of Delta Sigma Modulators (,) processes the signal. The processed signal is down-converted by a converter (,) to 64 fs. As least the Delta Sigma Modulators may be implemented on an integrated circuit. The down-converter is arranged to prevent noise being folded back into the signal band.

A signal processor for 1-bit signals comprises an nth order D Sigma Modulator (DSM) having an input (,) for receiving a 1-bit signal and an output (,) at which a processed 1-bit signal is produced by a quantizer (Q). The quantizer (Q) receives a p-bit signal from a series of 5 signal integration stages. Each stage comprises a first 1-bit multiplier (An) coupled to the input (,), a second 1-bit multiplier (Cn) coupled to the output (,), an adder (,n) which sums the outputs of the coefficient multipliers and an integrator (,n) which integrates the output of the adder (,n). A final stage comprises a coefficient multiplier (An&plus;1) and an adder (,n&plus;1). The adder (,n&plus;1) sums the output of the coefficient multiplier (An&plus;1) and the output of the integrator of the preceding integration stage. The input signal is fed to all the stages except the final stage via a 1-bit delay. The output signal of the quantizer is fed back to the stages via a 1-bit delay. The final stage receives the input signal without delay and also receives from the preceding stage the integral corresponding in timing to the input bit received thereby.

Signal processors for one bit signals

One-bit digital signal processing apparatus for generating an output one-bit signal by switching from a first to a second one-bit signal in response to a detection that m consecutive bits of the first and second signal are identical, the apparatus comprising means for varying m in dependence on the urgency of the switching operation.

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Chipping Norton, United Kingdom

Christopher Sleight