Texas Instruments Corporation

Christopher Slawinski

Clarence W Teng

William R Hunter

Robert R Doering

George L Brantingham

Gordon P Pollack

Richard A Houghton

An inductive coupled object identification system (FIGS. 2a and 2b) uses inductive coupling to detect and identify objects. Each object includes an object resonance circuit (LT/CT) with a unique object resonance frequency. Base electronics (50) includes an inductive-coupling base coil (L1) coupled to an oscillator circuit (60). To detect an object, the oscillator circuit continually sends START pulses to the base coil. When an object is proximate to the base coil, a START pulse is inductively coupled to the object resonance circuit, causing it to resonate at the object resonance frequency. This resonance condition is detected by the oscillator circuit, which outputs an oscillation signal FREQ at the object resonance frequency. Frequency counting logic (70) is used to determine the object resonance frequency, allowing a microcomputer (80) to identify the object. Two embodiments of the object identification system are described: a dynamic embodiment (FIGS. 1a and 1b) in which ball-shaped objects (10) are dropped into a bowl (13) through a single base coil (L1) in the rim of the bowl, and a static embodiment (FIGS. 1c and 1d) in which ring-shaped objects (20) are placed over a post (23) incorporating multiple base coils (L1-L5). For the static embodiment, the multiple base coils are multiplexed by a base coil selector circuit (FIG. 2b, 100).

Inductive coupled object identification system and method

The specification discloses an isolation trench (36) formed in a semiconductor body. A stress relief layer (38) of oxide is formed on the interior walls of the trench (36), the layer (38) being sufficiently thin to prevent stressing of the lower corners of the trench (36). A masking layer (40) of nitride is formed over the layer (38). An isolation body (42) of oxide or polysilicon then refills the remainder of the trench and a cap oxide (43) and layer (44) of field oxide is formed over the semiconductor body and the filled trench.

Defect free trench isolation devices and method of fabrication

Method of fabricating defect free trench isolation devices

An integrated circuit isolation technology wherein the nitride-sidewall methods of the prior art are improved by performing an undercut and backfill before the second nitride (the sidewall nitride which prevents encroachment) is added to the first nitride (which covers the moat areas). Thus, the butt joint between the two nitrides is made more secure, and localized bird's-beaking at the butt joint between the moat nitride and the sidewall nitride does not occur.

Integrated circuit isolation

A sidewall-nitride isolation technology refines process control over lateral oxide encroachment by preventing any thinning of the nitride moat-masking layer during the nitride etch step which clears the sidewall nitride layer from the bottom of the etched recesses in silicon. This is done by initially patterning the moat regions in an oxide/nitride/oxide stack, rather than the nitride/oxide stack of the prior art.

Integrated circuit fabrication method utilizing selective etching and

An MOS-type VLSI device is made by a process which provides a planar surface yet maintains geometric control for narrow line widths. The field oxide is recessed by etching the surface of a semiconductor body using thick masking for active device areas. Deposition of field oxide with poor step coverage allows the sidewall to be removed, leaving the top of the field oxide at the same level as the original silicon surface. The thick mask areas are lifted off, resulting in a planar oxide-insulated pattern for formation of transistors or N+ conductive lines.

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Austin, TX, United States of America

Christopher Slawinski