Applied Materials, Inc.

Christopher S Ngai

Huixiong Dai

Christopher Dennis Bencher

Wenhui Wang

Ellie Y Yieh

Bok Hoen Kim

Timothy Weidman

Ian Scot Latchford

Srinivas D Nemani

Michael Robert Rice

Kevin P Fairbairn

Judy H Huang

Chentsau Chris Ying

Sudha S Rathi

Yuxiang May Wang

Mangesh Bangar

Ludovic Godet

Yongmei Chen

Xianmin Tang

Mahendra Pakala

Chando Park

Sahil Patel

Bencherki Mebarki

Lin Xue

Jaesoo Ahn

Daniel Lee Diehl

Jun Xue

Jong Mun Kim

Jingjing Liu

Joe Feng

Minrui Yu

Steven Hiloong Welch

Michael S Barnes

Mehul B Naik

Khoi A Phan

Deenesh Padhi

Pramit Manna

Rongjun Wang

Tom K Cho

Yong Cao

Suketu Arun Parikh

Hao Chen

Michael D Armacost

Hongching Shan

Joung Joo Lee

Keith Tatseun Wong

Claes H Bjorkman

Weimin Zeng

Nagarajan Rajagopalan

Liqi Wu

Kenny Linh Doan

Jingbao Liu

Wendy H Yeh

Wenyu Zhang

Li Yan Miao

Ke Chang

Eda Tuncel

Linh Thanh

Meiyee (Maggie Le) Shek

Xumou Xu

Hong D Nguyen

Peter Chen

Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.

Contact over active gate structure

Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.

Spin-orbit torque MRAM structure and manufacture thereof

A method for enhancing the depth of focus process window during a lithography process includes applying a photoresist layer comprising a photoacid generator on a material layer disposed on a substrate, exposing a first portion of the photoresist layer unprotected by a photomask to light radiation in a lithographic exposure process, providing a thermal energy to the photoresist layer in a post-exposure baking process, applying an electric field or a magnetic field while performing the post-exposure baking process, and dynamically changing a frequency of the electric field as generated while providing the thermal energy to the photoresist layer.

Lithography process window enhancement for photoresist patterning

Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.

Film structure for electric field guided photoresist patterning process

In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas and a hydrogen-containing gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein adjusting the flow rate of the hydrogen containing gas tunes the optical properties of the deposited amorphous silicon layer.

Methods for depositing amorphous silicon layers or silicon oxycarbide layers via physical vapor deposition

Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.

Method for forming a layer

Methods of forming and processing semiconductor devices which utilize a three-color process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing selective deposition of overlapping masks in a three-color process.

Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts utilizing selective deposition of masks in a three-color process.

Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method for processing a substrate includes: directing a stream of material from a PVD source toward a surface of a substrate at a first non-perpendicular angle to the plane of the surface to deposit the material on one or more features on the substrate and form a first overhang; etching the layer of the substrate beneath the features selective to the deposited material to form a first part of a pattern; removing the material from the features; directing the stream of material from the PVD source toward the surface of the substrate at a second non-perpendicular angle to the plane of the surface to deposit the material on the features on the substrate and form a second overhang; and etching the layer of the substrate beneath the features selective to the deposited material to form a second part of the pattern.

Methods and apparatus for patterning substrates using asymmetric physical vapor deposition

A nanocrystalline diamond layer for use in forming a semiconductor device and methods for using the same are disclosed herein. The device can include a substrate with a processing surface and a supporting surface, a device layer formed on the processing surface and a nanocrystalline diamond layer formed on the processing layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm. The method can include positioning a substrate in a process chamber, depositing a device layer on a processing surface, depositing a nanocrystalline diamond layer on the device layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm, patterning and etching the nanocrystalline diamond layer, etching the device layer to form a feature and ashing the nanocrystalline diamond layer from the surface of the device layer.

Nanocrystalline diamond carbon film for 3D NAND hardmask application

Particulate cleaning assemblies and methods for cleaning are disclosed. In one example, a device for removing particles from a backside surface of a substrate is described. The device includes a chamber body with a substrate chucking device, a particulate cleaning article positioned over the substrate supporting surface, an optical sensing device positioned under the particulate cleaning article and a substrate positioning device separates the particulate cleaning article and a substrate. In another example, a method for removing particles from a substrate is disclosed. The method includes positioning a substrate with a processing surface and a supporting surface in a process chamber. At least a portion of the substrate can be chucked to a substrate chucking device, the substrate chucking device having a substrate supporting surface with a particulate cleaning article positioned thereon. The substrate is then separated from the particulate cleaning article leaving particles behind.

Roll to roll wafer backside particle and contamination removal

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Santa Clara, CA, United States of America

Christopher S Ngai