Inmos Limited

Sgs-Thomson Microelectronics Limited

Stmicroelectronics Gmbh

Sgs-Thomson Microelectronics S.r.l.

4 Links for Technical Help

Christopher Paul Walker

Elwyn P Wakefield

Michael David May

Peter William Thompson

Brian J Parsons

Barry Michael Cook

Peter W Thompson

Peter J Wilson

A communication system includes two high speed communication links formed by pairs of transformers at either end thereof. A phantom circuit formed by the pairs of transformers is used to distribute power to devices connected to the high speed links. In transmission part of a communications system, data is transmitted under the control of a continuously variable frequency clock. Transmission is on parallel data-strobe links, and the receive includes circuitry to identify on which parallel the data signal is preset. A method and circuitry is provided for transmitting and receiving dc balanced data strobe signals.

Communications system for driving pairs of twisted pair links

A semiconductor device comprising at least one semiconductor chip, the or each semiconductor chip having a plurality of chip bonding pads, a package which encloses the at least one semiconductor chip, a first level interconnect comprising a printed circuit which overlies the at least one semiconductor chip in the package and extends externally of the package to provide a plurality of outer leads, and a second level interconnect comprising means for electrically connecting the chip bonding pads to selected contacts on the printed circuit, which contacts overlie the at least one semiconductor chip. The invention also relates to a method of manufacturing such a semiconductor device and to a method of assembling a semiconductor assembly.

Semiconductor chip packaging having printed circuitry or printed circuit

A method of encoding first and second symbols each having n binary bits into first and second code words each having n-1 ternary trits is disclosed. The method involves using a preselected bit from each of the first and second symbols to determine which one of at least two groups of code words comprising n-1 trits is used for encoding. An analogous method of decoding is also disclosed. Apparatus for performing the encoding and decoding is disclosed.

Coding scheme for transmitting data

A method of encoding a five bit symbol into a four trit code word is disclosed, comprising defining out of forty-eight combinations of four trit code words three groups, each group containing sixteen code words, each code word within a group having a Hamming distance of at least two from any other code word in the group, and each code word being associated with a particular combination of four bits selected from said five bit symbol. An analogous method of decoding is also disclosed. Apparatus for performing the encoding and decoding is disclosed.

5B4T coding scheme

A particular encoding scheme for encoding four bit values into six-bit symbols selects from the table below the six-bit symbol corresponding to a particular four bit value:

Encoding scheme

An encoding scheme relies on a d.c. balanced code wherein each message to be transmitted is sent as a plurality of symbols, each symbol having six bits, three ones and three zeros. Out of the twenty combinations of balanced six-bit codes, two codes are reserved to operate as control tokens, being 010101 and 101010. Because of the particular format of the symbols, control tokens can be easily detected. Furthermore, they can be combined in longer bit sequences for use as initialization and disconnect sequences.

Encoding digital data

An encoding scheme relies on a d.c. balanced code wherein each message to be transmitted is sent as a plurality of symbols, each symbol having six bits, three ones and three zeros. Out of the twenty combinations of balanced six-bit codes, two codes are reserved to operate as control tokens, being 010101 and 01010. Because of the particular format of the symbols, control tokens can be easily detected. Furthermore, they can be combined in longer bit sequences for use as initialisation and disconnect sequences.

A coding scheme for transmitting messages particularly between computers is described. Messages are transmitted in packets which include at least a data portion and a terminator. Out of a predetermined set of symbols, sixteen data symbols and at least one control symbol is selected. The terminator token is generated to constitute the symbol and a six-bit symbol representing checking bits.

Transmission of messages

A scheme for altering checking information in a message packet intended to be transmitted between computers is described. In this scheme, when an information portion of the packet is altered, checking bits contained in the packets are altered in dependence only on the set of checking bits in the message packet before modification of the information portion and on the modifications to the information portion. Thus, it is not necessary to generate new checking bits from a modified information portion.

Generation of checking data

A semiconductor chip package comprising at least one semiconductor chip disposed in a package and a plurality of first and second pins extending from the package, which first pins are electrically connected to the at least one semiconductor chip and are adapted to conduct signals between the at least one semiconductor chip and external circuitry, the first pins being divided into a plurality of groups, each group representing a respective signal type, and which second pins are not electrically connected to the at least one semiconductor chip, the first pins of at least one group and the second pins being asymmetrically disposed along edges of the package and the remaining groups of first pins being symmetrically disposed along edges of the package. The invention also provides a stacked module of the semiconductor chip packages.

Semiconductor chip packages

A method of encoding data for transmission between computer devices is disclosed in which data is encoded into a plurality of sequences, each sequence containing an equal number of ones and zeros and being of a predetermined bit length. There is a finite set of the permutations of equal numbers of ones and zeros in that predetermined bit length. One subset of the finite set is selected for use as data codes and a second subset is selected for use as control codes.

Message encoding which utilizes control codes and data codes

A semiconductor chip package comprising at least one semiconductor chip disposed in a package and a plurality of first and second pins extending from the package, which first pins are electrically connected to the at least one semiconductor chip and are adapted to conduct signals between the at least one semiconductor chip and external circuitry, the first pins being divided into a plurality of groups, each group representing a respective signal type, and which second pins are not electrically connected to the at least one semiconductor chip, the first pins of at least one group and the second pins being asymmetrically disposed along edges of the package and the remaining groups of first pins being symmetrically disposed along edges of the package. The invention also provides a stacked module of the semiconductor chip package.

A routing switch includes an input for receiving serial packets from a source node in a computer network, a plurality of outputs each designating a respective range of destination node identifications, switch circuitry for selectively interconnecting said input to a selected one of said outputs and header reading circuitry for reading the header portion of a packet received at the input prior to receiving all of the packet. The header reading circuitry is coupled to the switch circuitry to connect to said input one of said outputs having a node identification range including the node identification of said header portion. There is also provided a computer network, having a plurality of computer devices and at least one routing switch, and a method of routing messages through such a network.

Message routing

A routing switch includes an input for receiving serial packets from a source node in a computer network, a plurality of outputs, switch circuitry for selectively interconnecting said input to a selected one of said outputs and header reading circuitry for reading the header portion of a packet received at the input prior to receiving all of the packet. The switch also has a random header generator which produces header portions generated at random which are then read by the header reading circuitry. The header reading circuitry is coupled to the switch circuitry to connect to said input one of said outputs in dependence on said random header. The random header portion is then discarded at the routing switch identified thereby to reveal the original header.

A semiconductor device comprising at least one semiconductor chip, the or each semiconductor chip having a plurality of chip bonding pads, a package which encloses the at least one semiconductor chip, a first level interconnect comprising a printed circuit which overlies the at least one semiconductor chip in the package and extends externaly of the package to provide a plurality of outer leads, and a second level interconnect comprising means for electrically connecting the chip bonding pads to selected contacts on the printed circuit, which contacts overlie the at least one semiconductor chip. The invention also relates to a method of manufacturing such a semiconductor device and to a method of assembling a semiconductor assembly.

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Portishead, United Kingdom

Christopher Paul Walker