Eastman-kodak Company

Truesense Imaging, Inc.

Semiconductor Components Industries, LLC

Omnivision Technologies, Inc.

Christopher Parks

Gregory Oscar Moberg

John Thomas Compton

David L Losee

David N Nichols

Eric Gordon Stevens

John Paul McCarten

Joseph R Summa

Madhav Mehra

Gilbert Alan Hawkins

Jaroslav Hynecek

Shen Wang

James P Lavine

Robert P Fabinski

William F DesJardin

Stephen Kosman

Keith Wetzel

Gang Shi

H Marc Hunt

John P McCARTEN

Howard Marc Hunt

An image sensor may include imaging pixels with non-destructive readout capabilities. Each imaging pixel may include a substrate having a photosensitive area that generates charge in response to incident light. The charge may accumulate at a front side of the substrate adjacent to a floating gate. The voltage of the floating gate may depend on how much charge is accumulated. The voltage of the floating gate may be repeatedly sampled to monitor the amount of incident light received over time. A first reset transistor may clear the substrate of accumulated charge. A second reset transistor may reset the voltage of the floating gate. The imaging pixel may be split between multiple wafers if desired and may include nMOS and pMOS transistors.

Imaging pixels with non-destructive readout capabilities

A time delay integration image sensor may include a number of charge coupled devices (CCDs) that transfer charge in synchronization with the movement of an object being imaged. To increase the dynamic range of the image sensor, the image sensor may include circuitry configured to non-destructively sample the charge as it is transferred through the charge coupled devices. Floating gates may be included in the image sensor and may have a voltage that is proportional to the charge accumulated under the floating gates. Each floating gate may be coupled to a respective readout circuit in an additional substrate by a metal interconnect layer.

Time delay integration image sensors with non-destructive readout capabilities

A charge-coupled device (CCD) image sensor is provided. The CCD image sensor may include an array of photosensors that transfer charge to multiple vertical CCD shift registers, which then in turn transfer the charge to a horizontal CCD shift register. The horizontal CCD shift register then feeds an output buffer circuit. The output buffer circuit can include multiple output stages, each of which can include a source-follower transistor coupled in series with a current sink transistor and at least one cascode transistor. The current sink transistor may have its gate terminal shorted to ground. In one arrangement, the cascode transistor has a gate terminal that receives a non-zero bias voltage. In another arrangement, the cascode transistor has a gate terminal that is also shorted to ground and operates in depletion mode.

Image sensor with glow suppression output circuitry

A method of binning charges in a charge coupled device (CCD) image sensor is described. The frequency at which an HCCD in the CCD image sensor is clocked may be a multiple of the frequency at which a summing element coupled to the end of the HCCD is clocked, such that charges may be binned at a gate within the HCCD or at the summing element before being read out. The clock signal for the summing element may have a 50% duty cycle in order to provide additional time for charge to flow across an output gate to a floating diffusion node in an output stage of the CCD image sensor. For cases where the HCCD clock frequency is more than twice the summing element clock frequency, charges may be binned at the summing element. Otherwise, charges may be binned at another gate within the HCCD.

Methods for clocking an image sensor

A method of forming a microlens may include using two layers of photoresist. The first photoresist layer may be patterned to form a first portion of a pixel microlens. A second photoresist layer may be patterned on top of the first portion of the pixel microlens. The second photoresist may then be melted so that the second photoresist layer has a curved upper surface. The first and second photoresist layers may combine to form the pixel microlens. The indices of refraction of the first and second photoresist layers may the same or different. The melting point of the second photoresist may be lower than the melting point of the first photoresist.

Methods of forming imaging pixel microlenses

Methods of measuring and calibrating the gain of a CCD imaging system are described. Charge injectors may be present on either side of an image sensor array that provide test charges to respective calibration VCCDs. Test charges may be transferred to upper and lower HCCDs during quad-output read out or to only the lower HCCD during dual-output or single-output read out. In each quadrant of the imaging system, test charges may be transferred to an EMCCD output or to a non-EMCCD output via a charge switch based on the magnitude of the test charges. The gains of all EMCCD outputs and non-EMCCD outputs in the imaging system may be calibrated against one another by adjusting the gain at each output when a discrepancy is detected between any two outputs.

In electron multiplying charge coupled device (EMCCD) image sensors, electron traps in the dielectric stack underneath charge multiplication electrodes may cause undesirable gain ageing. To reduce the gain ageing drift effect, a dielectric stack may be formed that does not include electron traps in regions underneath charge multiplication electrodes. To accomplish this, silicon nitride in the dielectric stack may be removed in regions underneath the charge multiplication electrodes. The EMCCD image sensors can thus be fabricated with a stable charge carrier multiplication gain during their operational lifetime.

EMCCD image sensor with stable charge multiplication gain

In various embodiments, image sensors include output channels enabling high-gain and/or low-gain charge read-out while minimizing charge-conversion noise.

Charge sensing in image sensors with output channel having multiple-gain output paths

A method for producing an image sensor includes providing a horizontal shift register electrically connected to a pixel array for receiving charge packets from the pixel array. A non-destructive sense node is provided that is connected to an output of the horizontal shift register. A charge directing switch is provided that is electrically connected to the non-destructive sense node. The charge directing switch includes first and second outputs. A charge multiplying horizontal shift register is provided that is electrically connected to the first output of the charge directing switch. A bypass horizontal shift register or an amplifier is provided that is connected to the second output of the charge directing switch.

Method of producing an image sensor having multiple output channels

In various embodiments, a charge-coupled device includes channel stops laterally spaced away from the channel by fully depleted regions.

Depleted charge-multiplying CCD image sensor

A CCD image sensor includes vertical CCD shift registers and gate electrodes disposed over the vertical CCD shift registers. The gate electrodes are divided into distinct groups of gate electrodes. The CCD image sensor is adapted to operate in an accumulation mode and a charge transfer mode, an accumulation mode and a charge shifting mode, or an accumulation mode, a charge transfer mode, and a charge shifting mode. The charge transfer mode has an initial charge transfer phase and a final charge transfer phase. The charge shifting mode has an initial charge shifting phase and a final charge shifting phase.

CCD image sensor having multiple clocking modes

Multiple clocking modes for a CCD imager

An image sensor includes a horizontal shift register electrically connected to a pixel array for receiving charge packets from the pixel array. A non-destructive sense node is connected to an output of the horizontal shift register. A charge directing switch is electrically connected to the non-destructive sense node. The charge directing switch includes two outputs. A charge multiplying horizontal shift register is electrically connected to one output of the charge directing switch. A bypass horizontal shift register or an amplifier can be connected to the other output of the charge directing switch.

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Rochester, NY, United States of America

Christopher Parks