Unisys Corporation

Christopher M Cischke

James A Williams

Ashley K Wise

Jason D Sollom

Various approaches for generating input data for simulating a circuit design are disclosed. In one approach, a test generator program is generated from a main program that uses a test generator class library. The test generator class library includes a software driver class corresponding to the hardware driver, and the software driver class includes a storage class corresponding to each memory within the hardware driver, a first set including at least one method for writing function codes to a first object of the storage class, and a second set including at least one method for writing data to a second object of the storage class. Function codes are written to the first object of the storage class in response to a call by the test generator program to a method in the first set. Data of a first type is written to the second object of the storage class in response to a call by the test generator program to a method in the second set, wherein the data of the first type is data to be provided by the driver as input to the simulated circuit design.

Generation of tests used in simulating an electronic circuit design

An apparatus and method for generating test files for design verification of a simulated integrated circuit design such as a cache memory circuit, that involve steps of creating a series of functions, updating a data integrity buffer after each function is created, creating a series of integrity check functions from the data in the data integrity buffer, and writing the series of functions and the series of integrity check functions to a test file. This file can be compiled if necessary and executed by a software or hardware simulator.

Method and apparatus for creating integrated circuit simulator test source files

Techniques are described for emulating inter-processor communications between multiple instruction processors. The techniques provide inter-processor message accounting and error detection. A system, for example, includes software executing within an emulation environment provided by a computing system. The emulation software emulates an instruction processor having an interface to receive inter-processor messages. During emulation the emulated instruction processor calculates an actual count of the inter-processor messages received during emulation. A compiler executing on the computing system compiles test software to output an instruction stream for execution by the emulated instruction processor. The compiler calculates an expected count of inter-processor messages that the emulated instruction processor is expected to receive during emulation. Emulation control software executing on the computing system generates a report that presents the expected count of the inter-processor messages and the actual count of the inter-processor messages.

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Shoreview, MN, United States of America

Christopher M Cischke