Intel Corporation

Christopher M Cantalupo

Milind Baburao Girkar

Avinash Sodani

Richard J Greco

Andreas Kleen

Robert J Kyanko

Alan G Gara

Jonathan M Eastep

Ramkumar Nagappan

Steve S Sylvester

In one embodiment, a processor comprises: at least one core formed on a die to execute instructions; a first memory controller to interface with an in-package memory; a second memory controller to interface with a platform memory to couple to the processor; and the in-package memory located within a package of the processor, where the in-package memory is to be identified as a more distant memory with respect to the at least one core than the platform memory. Other embodiments are described and claimed.

Providing multiple memory modes for a processor including internal memory

Apparatus and methods may provide for characterizing a plurality of similar components of a distributed computing system based on a maximum safe operation level associated with each component and storing characterization data in a database and allocating non-uniform power to each similar component based at least in part on the characterization data in the database to substantially equalize performance of the components.

Mitigating component performance variation

Growing community of inventors

Portland, OR, United States of America

Christopher M Cantalupo