Intersil Americas Inc.

Intersil Corporation

Other

Harris Corporation

Christopher Ludeman

Douglas Lawton Youngblood

Gerald M Cotreau

Donald K Whitney, Jr

Donald Giles Koch

A bidirectional crosspoint switch interface employs a pair of backward-connected transimpedance amplifiers of the type disclosed in the L. Enriquez U.S. Pat. No. 6,411,163, and associated scaling current mirrors that drive nodes of associated reverse signal cancellation circuits. The reverse signal cancellation circuits are coupled to respective pairs of ports of the crosspoint switch and input and output ports of 1:1 current mirrors, in a manner that affords bidirectional buffering between the crosspoint switch and a pair of bidirectional signaling ports that terminate respective signaling links, without signal reflections.

Bidirectional buffered interface for crosspoint switch

A MOSFET-based, multi signal-switching circuit controllably passes analog/audio signals and digital signals through a common terminal to a single connector. Analog/audio signals are coupled through a single N-channel MOSFET analog signal switch which, when turned-ON, minimizes distortion of the analog/audio signal and capacitive loading to an adjacent, MOS-based or CMOS-based digital data signal switch. A respective turn-OFF circuit maintains its associated switch MOSFET turned OFF.

Method and apparatus for switching audio and data signals through a single terminal

A digitally configurable multiplexer/de-multiplexer including several multiplexers, a switch matrix, and configuration logic. Each multiplexer receives multiple address signals, selects from among multiple first data signals and couples a selected first data signal to a corresponding one of several multiplexed signals. The switch matrix has a first interface coupled to the multiplexed signals and a second interface coupled to multiple second data signals. The configuration logic receives selection signals and controls the switch matrix to couple selected ones of the multiplexed signals to the second interface.

Digitally configurable multiplexer/de-multiplexer

A method and apparatus for internally testing portions of a subscriber loop interface circuit. Testing may be conducted on a semiconductor circuit including the subscriber loop interface circuit. The portion of the subscriber loop interface circuit being tested may be the ring trip detector and/or the off-hook detect circuit. Testing may be conducted without disabling the capability of the subscriber loop interface circuit to monitor the hook status of a subscriber.

Apparatus and method for testing subscriber loop interface circuits

A telecommunication interface integrates DSL and POTS components in a manner which effectively separates their bandwidth requirements from their power requirements. This is accomplished by powering the tip path and ring path amplifiers with a pair of transformer-coupled floating power supply-sourced voltages, and referencing respective like polarity inputs of the amplifiers to a differential voltage pair that is used to operate the subscriber loop, including providing loop current and controllably applying a ringing voltage to the POTS line.

Integrated POTS/DSL line driver with floating supply voltage

A subscriber loop interface circuit and method for externally programming the on-hook, off-hook, and transition states of the subscriber loop interface circuit. The circuit having an off-hook overhead sufficient for long loop applications and having a continuous loop current to loop voltage relationship. The circuit may have plural means for generating reference currents for comparison with loop currents.

Programmable subscriber loop interface circuit and method

A method and apparatus for internally testing portions of a subscriber loop interface circuit. Testing may be conducted on a semiconductor circuit including the subscriber loop interface circuit. The portion of the subscriber loop interface circuit being tested may be the ring trip detector and/or the off-hook detect circuit. Testing of may be conducted without disabling the capability of the subscriber loop interface circuit to monitor the hook status of a subscriber.

In a subscriber loop interface circuit, a novel method and apparatus for measuring loop impedance. Measurement of loop impedance including charging and discharging a capacitor using current derived from loop current and loop voltage. The discharge time interval of the capacitor may provide information on loop impedance. A look-up table in a subscriber loop interface circuit may include previously calculated impedance values corresponding to discharge time.

Apparatus and method for measuring loop impedance

A subscriber loop interface circuit is provided that includes a current directing element for directing current from the output stage of line interface amplifiers. The current is directed to a secondary power supply having a magnitude lower than the conventional primary power supply of a subscriber loop interface circuit in supplying power to a subscriber loop.

Battery switching subscriber loop interface circuit

A method and circuit for loopback testing a telephone subscriber line interface circuit (SLIC) includes current sources connected to each of tip and ring circuits from which switch-hook is detected in the SLIC. A loopback test of the SLIC is conducted when the telephone is on-hook and is successful when the current from the current sources simulates a switch-hook detection, The current sources may also be used during on-hook transmission. A ground key detect circuit in the SLIC may be used to verify a successful loopback test by using current from the current sources in the ground key detect circuit to check for a grounded ring circuit in the SLIC.

Growing community of inventors

Palm Bay, FL, United States of America

Christopher Ludeman