Advanced Micro Devices Corporation

Christopher Lee Pike

Scott Allan Bell

Ramkumar Subramanian

Christopher F Lyons

Alexander H Nickel

Khanh B Nguyen

Che-Hoo Ng

Vincent L Marinaro

Anne E Sanderfer

Steven J Zika

David Ashby Steele

A wedge-shaped nozzle for dispensing fluids onto a round surface is disclosed. The nozzle dispenses the fluid with a generally uniform volume of fluid per unit area of the round surface to achieve rapidly a uniform thickness of applied fluid on the round surface. The wedge-shaped nozzle has orifices of equal size disposed on its bottom through which the fluid is dispensed. The orifices are disposed along arcs, with increasing numbers of orifices on the arcs at greater and greater distances of the arcs from the apex of the wedge-shaped nozzle. The numbers of the orifices on each arc are proportional to the area of an annular region determined by the arcs.

Apparatus for the application of developing solution to a semiconductor wafer

The present invention relates to a system and a method for reducing the linewidth of ultra thin resist features. The present invention accomplishes this end by applying a densification process to an ultra thin resist having a thickness of less than about 2500 &angst; formed over a semiconductor structure. In one aspect of the present invention, the method includes providing a semiconductor substrate having a device film layer formed thereon. An ultra thin resist is then deposited over the device film layer. The ultra thin resist is patterned according to a desired structure or feature using conventional photolithography techniques. Following development, the ultra thin resist is implanted with a dopant. After the implantation is substantially completed, the device film layer is anisotropically etched.

Method for ultra thin resist linewidth reduction using implantation

A defect categorization method is described. Two or more regions are defined on a die. These regions can be repeated for other dies on the same wafer or corresponding regions on other dies on other wafers. The wafer(s) are scanned for defects. The location of each defect, along with any other desired defect data is stored. The stored defect data is then categorizing by region or regions within a die. As a result of the categorization, optional defect generation predictions can be made or optional yield or kill ratio predictions can be made. Also, specific regions(s) can be rescanned based on the result of the categorization.

Method for detecting and categorizing defects

In providing a bottom antireflective coating (BARC) in a semiconductor structure, a primer layer, for example, hexamethyldisilazane (HMDS), is provided on a substrate, and the BARC is formed on the primer. This results in a substantially defect free BARC layer, having a more uniform reflectivity which in turn leads to improve to photolithographic pattern resolution.

Low defect organic BARC coating in a semiconductor structure

A method of manufacturing a semiconductor device includes forming a second barrier layer over a first level, forming a first dielectric layer over the second barrier layer, forming a second dielectric layer over the first dielectric layer, etching the first and second dielectric layers to form an opening through the first dielectric layer and the second dielectric layer, and depositing an anti-reflective material in the opening at an optimal thickness. The optimal thickness is determined by minimizing a standard deviation of reflectivity of the anti-reflective material. After etching the first dielectric layer, the anti-reflective material can then be completely removed and the second barrier layer is etched to expose the first level. The trench and a via are then filled with a conductive material to form a feature.

Optimization of organic bottom anti-reflective coating (BARC) thickness for dual damascene process

An improved method of forming circuit structures having linewidths which are smaller than what is achievable by conventional UV lithographic techniques on ultra-thin resist layers is provided. The method includes a hardmask which is patterned using an ultra-thin resist layer and is then trimmed to reduce the width of the hardmask before etching the underlying gate conductive layer.

Hardmask trim process

There is provided an on-wafer apparatus and method for calibrating the sensitivity of a patterned wafer defect inspection tool during set-up which is used to detect defects on the surface of a semiconductor wafer during the stages of a fabrication process. A semiconductor wafer which is to be inspected for defects is provided. A calibration structure having known defects is introduced on a selected area of the semiconductor wafer which is to be inspected prior to, the inspection. The calibration structure includes a plurality of intentionally-introduced defects each being of a progressively smaller size dimension. Calibration of the sensitivity of the defect inspection tool is accomplished by scanning the semiconductor wafer with the calibration structure in order to determine the defects which are known to exist. As a result, there is provided a universal calibration method which allows an operator to know the smallest size defect which is detected by the defect inspection tool for each inspection in the fabrication process.

Mask, structures, and method for calibration of patterned defect inspections

In a method for detecting defects in both processed and unprocessed (blank) wafers, a manufacturer's identification mark is used to align wafers during inspection. The wafers, are subject to an initial scan under low magnification using an inspection tool and transferred to a high magnification analysis tool for more complete analysis. Prior to scanning, the wafers are oriented using the manufacturer's identification mark. The wafers become misaligned when transferred between tools. Using the manufacturer's identification mark, the wafers are reoriented and aligned. During scanning, defects in the wafer surface are located. The location of all defects are referenced to the location of the manufacturer's identification mark. To easily find defects when a wafer is transferred from tool to tool, the manufacturer's identification mark is located and, using a software algorithm, the wafer is oriented and aligned to the mark each time it is transferred and inspected. When placed in an analysis tool, the software algorithm aligns the wafer using the manufacturer's identification mark. This allows the analysis tool to navigate directly to the desired features (i.e. defects) without wasting undue time searching for them. Furthermore, a wafer can be aligned using the mark and inspected for defects and then subjected to processing, after which the wafer is realigned using the mark and inspected again. This allows easy identification and examination of defects introduced during processing.

Semiconductor wafer alignment method using an identification scribe

There is provided a method for applying a lower viscosity coating liquid onto a semiconductor wafer substrate so as to prevent adhesion loss and to maintain low defect level characteristics. This is achieved by priming the substrate with a bonding agent at a temperature in the range of 18&deg; C. to 50&deg; C. for a short amount of time. This is performed prior to the application of a liquid solvent. As a result, there is overcome the problems of poor adhesion to the substrates and high defect levels in the coated UTR films.

Method for coating ultra-thin resist films

Defect collecting structures for photolithography

There is provided a method of applying a developing liquid onto a semiconductor wafer substrate having a UTR film thereon so as to minimize unexposed film thickness loss during development. This is achieved by applying the developing liquid from a developer nozzle which is off-set from the central position of the wafer substrate. The developing liquid is allowed to contact the wafer substrate for less than 10 seconds. As a result, there is overcome the problems of unexposed film thickness loss and critical dimension variations due to the developer nozzle effects.

Method for developing ultra-thin resist films

A liquid dispenser system uses a container that has a reservoir in the bottom of the container and an opening in the top of the container. The dispenser has a cover, which covers the opening in the container and a draw tube that extends from the cover into the reservoir. An end of the draw tube in the reservoir has a plurality of inlets. The average cross-section of the reservoir below the inlets of the draw tube is less than one fourth of the average cross-section of the rest of the container. As a result of the difference in average cross-sections, the invention reduces the amount of liquid that the dispenser is not able to dispense, which reduces wasted liquid. In a production environment, the reduction in waste results in a reduction in down time.

Liquid chemical container with integrated fluid reservoir

There is provided an improved resist coating/developing processing method and apparatus for a wafer track system so as to increase its throughput. In a preferred embodiment, this is achieved by integrating a wafer edge exposure unit with a temperature control plate unit into a single integrated processing unit having the functionality of the two separate processing units.

Integrated edge exposure and hot/cool plate for a wafer track system

An improved particle-collecting cup using a fabrication protective device for use in processing semiconductor wafers includes a deflective surface, a protective shield and a protective lip to protect the surface of the semiconductor. The deflective surface encircles the semiconductor and extends both above and below the semiconductor at an inclined angle. The radius of the opening formed by the upper end of the deflective surface is at least as small as the radius of the semiconductor. The protective shield extends downward toward the semiconductor and the protective lip is inclined outward. Any particles spun off from the fluid coating of the semiconductor that may have been reflected are guided away from the surface of the semiconductor by the semiconductor fabrication extended particle collection cup.

Semiconductor fabrication extended particle collection cup

A method and system for measuring a fluid in a photolithography track is disclosed. The method includes dispensing the fluid in a photolithography track into a self-contained reservoir, and measuring the volume of the fluid using the self-contained reservoir. In a preferred embodiment, the reservoir receives the fluid from the dispenser through a drain pipe. By measuring the volume of fluid in this manner, spillage of fluid is prevented because the volume measuring apparatus in accordance with the present invention is self-contained. This prevents corrosion and other damage to the parts of the photolithography track which come into contact with the spilled fluid. With no spillage, a more consistent volume measurement is obtained. The volume measurement is also much quicker to perform than conventional methods.

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Fremont, CA, United States of America

Christopher Lee Pike