Applied Materials, Inc.

Western Digital (fremont), Inc.

Sokudo Co., Ltd.

Alta Devices, Inc.

Utica Leaseco, LLC

Christopher L Beaudry

Shaoping Li

Steven C Rudy

Joseph Frederick Behnke

Scott Osterman

Timothy Douglas Toth

Trevor Wilantewicz

Steven Verhaverbeke

Brian J Brown

Gerardo Bertero

Vahid Firouzdor

Joseph Frederick Sommers

Hyun-Ho Doh

Yingbo Zhang

Stephen M Fisher

Arvinder Manmohan Singh Chadha

Laksheswar Kalita

Robindranath Banerjee

Jonathan J Strahle

Nitin K Ingle

Michael Robert Rice

Vijay D Parkhe

Haiwen Xi

Ming Mao

Harald Herchen

Qunwen Leng

Yunfei Ding

David H Quach

Glen T Mori

Shihai He

Zhihong Zhang

Zhipeng Li

Hanish Kumar Panavalappil Kumarankutty

Haifeng Wang

Gayatri Natu

Luc Chung

Lok Kee Loh

Mahesh Arcot

Jianxin Fang

Jimmy J Shen

Senthil Kumar Nattamai Subramanian

Ryan Michael Pakulski

Hari Venkatesh Rajendran

Nikshep M Patil

Guolun Hao

Yogesh Tomar

Nilesh Mistry

Kirubanandan Shanmugam Naina

Ruisheng Liu

Sharathchandra Somayaji

A method including using a plurality of clamp electrodes of a substrate support to electrostatically secure a substrate during a process. The method further includes actively discharging a residual charge from the substrate after completion of the process based on at least one of contacting a backside of the substrate with a conductive lift pin or exposing the substrate to ultraviolet light. The method further includes raising a plurality of lift pins disposed in the substrate support to a first height to lift the substrate off of the substrate support after the discharging of the residual charge.

Efficient dechucking and particle management in process chambers

An electrostatic chuck assembly includes a first puck plate including one or more first functional elements, a second puck plate including one or more second functional elements, and an interface layer at least partially bonding the first puck plate and the second puck plate.

Modular substrate support assembly

Packaging insert for a process chamber component

A method includes performing an atomic layer deposition (ALD) process with respect to a plurality of target elements to coat interiors of the plurality of target elements with a protective coating. Performing the ALD process includes alternating delivery of a first precursor inside the plurality of target elements for a first duration to form an adsorption layer on the interiors of the plurality of target elements, alternating purging of the first precursor from the plurality of target elements for a second duration, and alternating delivery of a second precursor inside the plurality of target elements for a third duration to cause the second precursor to react with the adsorption layer and form a target layer on the interiors of the plurality of target elements.

Parallel atomic layer deposition of target element interiors

Exemplary methods for a coating a component of a semiconductor processing system may include forming a nickel-containing alloy on an exposed surface the component of the semiconductor processing system. The methods may include forming plasma effluents of a fluorine-containing precursor. The methods may include contacting the nickel-containing alloy with the plasma effluents of the fluorine-containing precursor. The contacting may fluorinate a portion of the nickel-containing alloy to form a nickel-and-fluorine-containing material overlying the nickel-containing alloy.

Semiconductor chamber components with advanced dual layer nickel-containing coatings

The present technology is generally directed to semiconductor processing systems and methods. Systems and methods include a chamber having a plurality of chamber components, such as a pedestal, a lid stack, a faceplate, electrode, and a showerhead. The faceplate is supported with the lid stack and defines a plurality of first apertures and the showerhead is positioned between the faceplate and the pedestal and defines a plurality of second apertures. In systems and methods, the faceplate, the showerhead, the lid stack, the pedestal, or a combination thereof include an yttrium fluoride, yttrium oxyfluoride, or both yttrium fluoride and yttrium oxyfluoride coating having a thickness of greater than 10 μm on at least a portion of the respective chamber component or combination thereof.

Semiconductor chamber components with advanced coating techniques

Embodiments of packaged chamber components and methods of packaging chamber components are provided herein. In some embodiments, a packaged chamber component for use in a process chamber includes: an insert having an annular trench disposed about a raised inner portion, wherein the annular trench is disposed between the raised inner portion and an outer lip, wherein a ledge couples the raised inner portion to the outer lip, wherein the ledge includes a first portion and a second portion disposed radially outward of the first portion, and wherein the second portion includes a resting surface that extends upward and radially outward of an upper surface of the first portion; and a chamber component disposed in the annular trench of the insert and supported by the resting surface such that one or more critical surfaces of the chamber component are spaced apart from the insert.

Minimal contact packaging for process chamber components

Described herein is a protective coating composition that provides erosion and corrosion resistance to a coated article (such as a chamber component) upon the article's exposure to harsh chemical environment (such as hydrogen based and/or halogen based environment) and/or upon the article's exposure to high energy plasma. Also described herein is a method of coating an article with the protective coating using electronic beam ion assisted deposition, physical vapor deposition, or plasma spray. Also described herein is a method of processing wafer, which method exhibits, on average, less than about 5 yttrium based particle defects per wafer.

Yttrium oxide based coating composition

A method and system for polishing a plurality of workpieces is disclosed. The method and system comprises providing a polishing tool with multiple polishing heads; and providing a substrate tray that can hold the plurality of work pieces in a fixed position on a tray underneath the polishing heads. The system and method includes moving the tray within the polisher. Finally, the method and system includes configuring the multiple polishing heads with the appropriate pad/slurry combinations to polish the workpieces and to create a finished polished surface on the plurality of work pieces.

High throughput polishing system for workpieces

A method and system provide a storage device. A plurality of read sensor stacks for each reader of the storage device are provided. The read sensor stacks are distributed along a down track direction and offset in a cross-track direction. A plurality of electronic lapping guides (ELGs) are provided for the read sensor stacks. The read sensor stacks are lapped. Lapping is terminated based on signal(s) from the ELG(s).

Stripe height lapping control structures for a multiple sensor array

A method for providing a storage device that includes a plurality of read sensor stacks for each reader of the storage device. The plurality of read sensor stacks are distributed along a down track direction and offset in a cross-track direction. A plurality of electronic lapping guides (ELGs) are provided for the read sensor stacks. The read sensor stacks are lapped. Lapping is terminated based on signal(s) from the ELG(s).

Method for providing a storage device

Growing community of inventors

San Jose, CA, United States of America

Christopher L Beaudry