Microsoft Technology Licensing, LLC

Vmware, Inc.

Christopher John Rossbach

Jonathan James Currey

Abbas Rafii

Michael Isard

Jayneel Gandhi

Eric Schkufza

Timothy Merrifield

Peiqian Zhao

Jean-Philippe Martin

Examples provide a method of virtualizing a hardware accelerator in a virtualized computing system. The virtualized computing system includes a hypervisor supporting execution of a plurality of virtual machines (VMs). The method includes: receiving a plurality of sub-programs at a compiler in the hypervisor from a plurality of compilers in the respective plurality of VMs, each of the sub-programs including a hardware-description language (HDL) description; combining, at the compiler in the hypervisor, the plurality of sub-programs into a monolithic program; generating, by the compiler in the hypervisor, a circuit implementation for the monolithic program, the circuit implementation including a plurality of sub-circuits for the respective plurality of sub-programs; and loading, by the compiler in the hypervisor, the circuit implementation to a programmable device of the hardware accelerator.

Compiler-driver programmable device virtualization in a computing system

The disclosure provides an approach for tracking metadata (e.g., accessed and dirty bits) of page tables at finer granularity than the size of the page tables. A disclosed herein, modification to existing hardware design may enable finer page table granularity of metadata, leading to more precise representation of the state of memory and an improvement to system performance and efficiency. Finer grain dirty metadata can dramatically improve the efficiency and simplicity of subsystems.

Decoupling memory metadata granularity from page size

An application programming interface is provided that allows programmers to encapsulate snippets of executable code of a program into accelerator tasks. A graph is generated with a node corresponding to each of the accelerator tasks with edges that represent the data flow and data dependencies between the accelerator tasks. The generated graph is used by a scheduler to schedule the execution of the accelerator tasks across multiple accelerators. The application programming interface further provides an abstraction of the various memories of the accelerators called a datablock. The programmer can store and use data stored on the datablocks without knowing where on the accelerators the data is stored. The application programming interface can further schedule the execution of accelerator tasks to minimize the amount of data that is copied to and from the accelerators based on the datablocks and the generated graph.

Scheduling accelerator tasks on accelerators using graphs

Various embodiments provide techniques and constructs to improve execution speed of distributed iterative computation using heterogeneous specialized resources including, for example, processors and accelerators. Iteration over an arbitrary sub-graph without loop unrolling including for algorithms with data-dependent loop termination and large iteration counts, including as a result of nested iteration, are supported in a resource-efficient manner without adding vertices to a dataflow graph to represent iteration constructs. Instead, some or all of the existing vertices within the sub-graph that is to be iterated upon based on having additional and/or modified ports and channels associated with them.

Iteration support in a heterogeneous dataflow engine

Computations are performed on shared datasets in a distributed computing cluster using aggressive speculation and a distributed runtime that executes code transactionally. Speculative transactions are conducted with currently available data on the assumption that no dependencies exist that will render the input data invalid. For those specific instances where this assumption is found to be incorrect&#x2014;that the input data did indeed have a dependency (thereby impacting the correctness of the speculated transaction)&#x2014;the speculated transaction is aborted and its results (and all transactions that relied on its results) are rolled-back accordingly for re-computation using updated input data. In operation, shared state data is read and written using only the system's data access API which ensures that computations can be rolled-back when conflicts stemming from later-determined dependencies are detected.

Transactional computation on clusters

An imaging system substantially simultaneously acquires z-depth and brightness data from first sensors, and acquires higher resolution RGB data from second sensors, and fuses data from the first and second sensors to model an RGBZ image whose resolution can be as high as resolution of the second sensors. Time correlation of captured data from first and second sensors is associated with captured image data, which permits arbitrary mapping between the two data sources, ranging from 1:many to many:1. Preferably pixels from each set of sensors that image the same target point are mapped. Many z-depth sensor settings may be used to create a static environmental model. Non-correlative and correlative filtering is carried out, and up-sampling to increase z-resolution occurs, from which a three-dimensional model is constructed using registration and calibration data.

Growing community of inventors

Menlo Park, CA, United States of America

Christopher John Rossbach