General Electric Company

Lockheed Martin Corporation

Ge Aviation Systems Limited

Christopher James Kapusta

Joseph Alfred Iannotti

Glenn Scott Claydon

James Enrico Sabatini

Kevin Matthew Durocher

Kaustubh Ravindra Nagarkar

David Richard Esler

Ertugrul Berkcan

Richard J Saia

Marco Francesco Aimi

Anis Zribi

Glenn A Forman

Laura Jean Meyer

Risto Ilkka Sakari Tuominen

Raymond Albert Fillion

Arun Virupaksha Gowda

Christopher Fred Keimel

Wei-Cheng Tian

Donald Paul Cunningham

James Wilson Rose

Thomas Bert Gorczyca

Yongjae Lee

Matthew Christian Nielsen

Samhita Dasgupta

Shankar Chandrasekaran

Ernest Wayne Balch

Richard Anthony Eddins

Liqiang Yang

Robert J Wojnarowski

Stanton Earl Weaver, Jr

Stephen Daley Arthur

Charles Erklin Seeley

Glen Peter Koste

Eladio Clemente Delgado

Brian Magann Rush

Jason Harris Karp

Min-Yi Shih

Nancy Cecelia Stoffel

David Cecil Hays

Judd Everett Swanson

Liang Yin

Eric Patrick Davis

Stacey Joy Goodwin

Youichi Nishihara

Liangchun Yu

Debbie Gahaton Jones

Emad Andarawis Andarawis

James Anthony Cella

Mehmet Arik

William P Kornrumpf

Paul Alan McConnelee

Jeffrey Michael Ashe

Robert Gideon Wodnicki

Charles Edward Baumgartner

Ahmed Elasser

Renato Guida

William Hullinger Huber

David Martin Mills

Weijun Yin

David Mulford Shaddock

Ramanujam Ramabhadran

Anthony Wykeham Jacomb-Hood

Kum-Kang Huh

David Joseph Najewicz

Charles Scott Sealing

George Charles Sogoian

Scott Sheridan Smith

William Joseph Taft

Brian Lynn Rowden

Eric Michael Breitung

Oliver Charles Boomhower

William Gregg Hawkins

Paul Jeffrey Gillespie

Nanette Gruber

Guanghua (George) Wu

Donald Leroy Lester

Piet Moeleker

Daniel Gerard Colombo

Donald Cunningham

Ertugal Berkcan

Kaustubh Ravindra Nadarkar

Richard Joseph Saia

Joseph Iannotti

Robert John Wojnarowski

Oliver Charles Boomhoower

Nanette Judith Gruber

Emad Anadarawis Andarawis

The disclosure relates to an apparatus for connecting an electronic component to a conductor. A housing includes at least one slot and defines at least one component chamber for carrying the electronic component. A liquid coolant can pass through the housing. A pair of conductive members extends from the housing through the at least one slot and can be releasably inserted into a channel defined in a support assembly. The support assembly facilitates an electrical connection between the conductive members and corresponding conductive contact members connected to a respective power supply or electrical load. The support assembly can provide an inward sealing force to a seal on the housing circumscribing the pair of conductive members.

Electronic connection assembly

A system includes a sensor comprising a sensor bonding layer disposed on a surface of the sensor, wherein the sensor bonding layer is a metallic alloy. An inlay includes a planar outer surface, wherein the inlay may be disposed on a curved surface of a structure. A structure bonding layer may be disposed on the planar outer surface of the inlay, wherein the structure bonding layer is a metallic alloy. The sensor bonding layer is coupled to the structure bonding layer via a metallic joint, and the sensor is configured to sense data of the structure through the metallic joint, the structure bonding layer, and the sensor bonding layer. The inlay comprises at least one of a modulus of elasticity, a shape, a thickness, and a size configured to reduce strain transmitted to the sensor.

Sensor system and method

The disclosure relates to an apparatus and method for liquid cooling of an electronic component. A housing includes an insertion slot and defines at least one component chamber for carrying the electronic component. A fluid inlet and fluid outlet are provided on the housing. A liquid coolant circuit passes through the housing at least from the inlet to the outlet.

Liquid-cooled assembly and method

An electronics package includes an electrically insulating substrate having a first surface and a second surface, an adhesive layer positioned on the first surface of the electrically insulating substrate, and an electrical component having a top surface coupled to the adhesive layer on a surface thereof opposite the electrically insulating substrate, the electrical component having contact pads on the top surface. Vias are formed through the electrically insulating substrate and the adhesive layer at locations corresponding to the contact pads by way of a mechanical punching operation, with each of the vias having a via wall extending from the second surface of the electrically insulating substrate to a respective contact pad. At each via, the electrically insulating substrate comprises a protrusion extending outwardly from the first surface thereof so as to cover at least part of the adhesive layer in forming part of the via wall.

Mechanical punched via formation in electronics package and electronics package formed thereby

A power overlay (POL) module includes a semiconductor device having a first side and an opposing second side, a dielectric sheet having a first side coupled to the semiconductor device second side, and an opposing second side, the dielectric sheet defining an aperture therethrough. The POL module also includes a first conductive layer disposed on the second side of the dielectric sheet and electrically coupled through the aperture to the semiconductor device second surface, a first conductive plate having a first side, and an opposing second side coupled to the first surface of the semiconductor device. The POL module further includes a first heat sink coupled the first side of the conductive plate and a first thermal interface layer disposed between the first conductive plate and the first heat sink.

Power overlay module and method of assembling

A semiconductor device is provided. The semiconductor device includes an electric field (E-field) suppression layer formed over a termination region. The E-field suppression layer is patterned with openings over metal contact areas. The E-field suppression layer has a thickness such that an electric field strength above the E-field suppression layer is below a dielectric strength of an adjacent material when the semiconductor device is operating at or below a maximum voltage.

High voltage semiconductor devices having improved electric field suppression

An electronics package is disclosed. The electronics package includes a first radio frequency (RF) substrate layer, a second RF substrate layer, and a plurality of conductive layers disposed adjacent to at least one of the first RF substrate layer and the second RF substrate layer and including an inner conductive layer disposed between and adjacent to both the first RF substrate layer and the second RF substrate layer. The inner conductive layer bonds the first RF substrate layer to the second RF substrate layer. The electronics package also includes a plurality of conductive interconnects extending through the first RF substrate layer and the second RF substrate layer and electrically coupled between at least two of the plurality of conductive layers.

Systems and methods for hybrid glass and organic packaging for radio frequency electronics

A sensor system for monitoring a condition of a piston rod includes an interrogator system having a first coil winding coupled to a housing and radially spaced from the piston rod such that a gap is defined between the first coil winding and the piston rod. A second coil winding is coupled to the piston rod and is inductively coupled to the first coil winding. The second coil winding is configured to communicate with the first coil winding through a range of linear movement of the piston rod relative to the housing. A sensor is coupled to the second coil winding. The sensor is configured to measure a characteristic associated with the piston rod and generate a current in the second coil winding to transmit, via the inductive coupling with the first coil winding, an electrical output signal associated with the characteristic to the interrogator system.

Systems and methods for piston rod monitoring

An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.

Stackable electronic package and method of fabricating same

A system includes a structure bonding layer and a sensor. The structure bonding layer is disposed on a structure. The structure bonding layer is a metallic alloy. The sensor includes a non-metallic wafer and a sensor bonding layer disposed on a surface of the non-metallic wafer. The sensor bonding layer is a metallic alloy. The sensor bonding layer is coupled to the structure bonding layer via a metallic joint, and the sensor is configured to sense data of the structure through the metallic joint, the structure bonding layer, and the sensor bonding layer.

A light emitting semiconductor (LES) device having desirable thermal performance characteristics is disclosed. The LES device includes an insulating substrate layer having a plurality of vias formed therein and at least one LES chip mounted on the insulating substrate layer, with each of the LES chips(s) including an active surface including a light emitting area configured to emit light therefrom and a back surface positioned on a top surface of the insulating substrate layer and including connection pads thereon. A conductor layer is positioned on a bottom surface of the insulating substrate layer and in the vias, the conductor layer in direct contact with the connection pads of the LES chip(s) so as to be electrically and thermally connected thereto. An encapsulant is positioned adjacent the top surface of the insulating substrate layer and surrounding at least part of the LES chip(s), the encapsulant comprising a light transmitting material.

Electronics package for light emitting semiconductor devices and method of manufacturing thereof

An electronics package includes a support substrate, an electrical component having a first surface coupled to a first surface of the support substrate, and an insulating structure coupled to the first surface of the support substrate and sidewalls of the electrical component. The insulating structure has a sloped outer surface. A conductive layer encapsulates the electrical component and the sloped outer surface of the insulating structure. A first wiring layer is formed on a second surface of the support substrate. The first wiring layer is coupled to the conductive layer through at least one via in the support substrate.

Electronics package including integrated electromagnetic interference shield and method of manufacturing thereof

Methods of fabricating a semiconductor device are provided. The method includes providing a plurality of semiconductor devices. The method further includes disposing a dielectric dry film on the plurality of semiconductor devices, wherein the dielectric dry film is patterned such that openings in the patterned dielectric dry film are aligned with conductive pads of each of the plurality of semiconductor devices.

Methods of fabricating high voltage semiconductor devices having improved electric field suppression

Growing community of inventors

Delanson, NY, United States of America

Christopher James Kapusta