Intel Corporation

Christopher J Wiegand

Kaan Oguz

Oleg Golonzka

Kevin O'Brien

Angeline Smith

Tofizur Rahman

Sasikanth Manipatruni

Justin Brockman

Brian S Doyle

Ian A Young

Mark L Doczy

Tanay Gosavi

Md Tofizur Rahman

Tahir Ghani

Daniel Ouellette

Noriyuki Sato

Benjamin Buford

Brian Maertz

Andrew Smith

Michael L Hattendorf

Mark Y Liu

Srijit Mukherjee

Chia-Ching Lin

Gary Allen

Dmitri E Nikonov

Daniel B Bergstrom

Juan G Alzate-Vinasco

Uygar E Avci

Charles C Kuo

Hui Jae Yoo

Jeffrey S Leib

Jasmeet S Chawla

Anurag Chaudhry

Kanwaljit Singh

Timothy E Glassman

Satyarth Suri

Nafees Kabir

Dax M Crum

Juan G Alzate Vinasco

Kevin P O'brien

Tyler J Weeks

James Pellegren

Michael Robinson

Huiying Liu

Pedro Quintero

Daniel R Lamborn

Aaron Littlejohn

Dan S Lavric

Hiten Kothari

Nathan Strutt

Michael Christenson

Conor P Puls

Mengcheng Lu

Dragos Seghete

Gokul Malyavanatham

Lukas M Baumgartel

Anant H Jahagirdar

Namrata S Asuri

Emily Walker

Yu-Jin Chen

Daniel B O'Brien

Matthew J Andrus

Juan Alzate Vinasco

Stephen Wu

Atm G Sarwar

Daniel Ouelette

Ben Buford

Patrick J Hentges

Trinh T Van

Ameya S Chaudhari

Rohan Patil

James ODonnell

Tanmoy Pramanik

Timothy Michael Duffy

Prashanth P Madras

Daniel G Oeullette

Philip E Heil

M D Tofizur Rahman

Rebecca J Castellano

Tarun Bansal

Daniel G Ouellette

Justin S Brockman

Integrated circuits including MOSFETs with selectively recessed gate electrodes. Transistors having recessed gate electrodes with reduced capacitive coupling area to adjacent source and drain contact metallization are provided alongside transistors with gate electrodes that are non-recessed and have greater z-height. In embodiments, analog circuits employ transistors with gate electrodes of a given z-height while logic gates employ transistors with recessed gate electrodes of lesser z-height. In embodiments, subsets of substantially planar gate electrodes are selectively etched back to differentiate a height of the gate electrode based on a given transistor's application within a circuit.

Integrated circuits with recessed gate electrodes

An apparatus is provided which comprises: a magnetic junction including: a stack of structures including: a first structure comprising a magnet with an unfixed perpendicular magnetic anisotropy (PMA) relative to an x-y plane of a device, wherein the first structure has a first dimension along the x-y plane and a second dimension in the z-plane, wherein the second dimension is substantially greater than the first dimension. The magnetic junction includes a second structure comprising one of a dielectric or metal; and a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures; and an interconnect adjacent to the third structure, wherein the interconnect comprises a spin orbit material.

Nano-rod spin orbit coupling based magnetic random access memory with shape induced perpendicular magnetic anisotropy

A memory device includes a bottom electrode, a conductive layer such as an alloy including ruthenium and tungsten above the bottom electrode and a perpendicular magnetic tunnel junction (pMTJ) on the conductive layer. In an embodiment, the pMTJ includes a fixed magnet, a tunnel barrier above the fixed magnet and a free magnet on the tunnel barrier. The memory device further includes a synthetic antiferromagnetic (SAF) structure that is ferromagnetically coupled with the fixed magnet to pin a magnetization of the fixed magnet. The conductive layer has a crystal texture which promotes high quality FCC &#x3c;111&#x3e; crystal texture in the SAF structure and improves perpendicular magnetic anisotropy of the fixed magnet.

Conductive alloy layer in magnetic memory devices and methods of fabrication

A memory device includes a first electrode, a conductive layer including iridium above the first electrode and a magnetic junction directly on the conductive layer. The magnetic junction further includes a pinning structure above the conductive layer, a fixed magnet above the pinning structure, a tunnel barrier on the fixed magnet, a free magnet on the tunnel barrier layer and a second electrode above the free magnet. The conductive layer including iridium and the pinning structure including iridium provide switching efficiency.

Magnetic memory devices and methods of fabrication

A memory apparatus includes a first electrode having a spin orbit material. The memory apparatus further includes a first memory device on a portion of the first electrode and a first dielectric adjacent to a sidewall of the first memory device. The memory apparatus further includes a second memory device on a portion of the first electrode and a second dielectric adjacent to a sidewall of the second memory device. A second electrode is on and in contact with a portion of the first electrode, where the second electrode is between the first memory device and the second memory device. The second electrode has a lower electrical resistance than an electrical resistance of the first electrode. The memory apparatus further includes a first interconnect structure and a second interconnect, each coupled with the first electrode.

Spin orbit memory devices with dual electrodes, and methods of fabrication

A memory device includes a perpendicular magnetic tunnel junction (pMTJ) stack, between a bottom electrode and a top electrode. In an embodiment, the pMTJ includes a fixed magnet, a tunnel barrier above the fixed magnet and a free magnet structure on the tunnel barrier. The free magnet structure includes a first free magnet on the tunnel barrier and a second free magnet above the first free magnet, wherein at least a portion of the free magnet proximal to an interface with the free magnet includes a transition metal. The free magnet structure having a transition metal between the first and the second free magnets advantageously improves the switching efficiency of the MTJ, while maintaining a thermal stability of at least 50 kT.

Magnetic memory devices with a transition metal dopant at an interface of free magnetic layers and methods of fabrication

An apparatus is provided which comprises: a magnetic junction having a magnet with perpendicular magnetic anisotropy (PMA) relative to an x-y plane of a device. In some embodiments, the apparatus comprises an interconnect partially adjacent to the structure of the magnetic junction, wherein the interconnect comprises a spin orbit material, wherein the interconnect has a pocket comprising non-spin orbit material, wherein the pocket is adjacent to the magnet of the magnetic junction. In some embodiments, the non-spin orbit material comprises metal which includes one or more of: Cu, Al, Ag, or Au.

Perpendicular spin injection via spatial modulation of spin orbit coupling

A memory device includes a first electrode including a spin-orbit material, a magnetic junction on a portion of the first electrode and a first structure including a dielectric on a portion of the first electrode. The first structure has a first sidewall and a second sidewall opposite to the first sidewall. The memory device further includes a second structure on a portion of the first electrode, where the second structure has a sidewall adjacent to the second sidewall of the first structure. The memory device further includes a first conductive interconnect above and coupled with each of the magnetic junction and the second structure and a second conductive interconnect below and coupled with the first electrode, where the second conductive interconnect is laterally distant from the magnetic junction and the second structure.

Two terminal spin orbit memory devices and methods of fabrication

A spin orbit memory device includes a material layer stack on a spin orbit electrode. The material layer stack includes a magnetic tunnel junction (MTJ) and a synthetic antiferromagnetic (SAF) structure on the MTJ. The SAF structure includes a first magnet structure and a second magnet structure separated by an antiferromagnetic coupling layer. The first magnet structure includes a first magnet and a second magnet separated by a single layer of a non-magnetic material such as platinum. The second magnet structure includes a stack of bilayers, where each bilayer includes a layer of platinum on a layer of a magnetic material such.

Spin orbit memory devices with reduced magnetic moment and methods of fabrication

An insertion layer for perpendicular spin orbit torque (SOT) memory devices between the SOT electrode and the free magnetic layer, memory devices and computing platforms employing such insertion layers, and methods for forming them are discussed. The insertion layer is predominantly tungsten and improves thermal stability and perpendicular magnetic anisotropy in the free magnetic layer.

Spin orbit torque device with insertion layer between spin orbit torque electrode and free layer for improved performance

An apparatus, includes an interconnect, including a conductive material, above a substrate and a resistive random access memory (RRAM) device coupled to the interconnect. The RRAM device includes an electrode structure above the interconnect, where an upper portion of the electrode structure has a first width. The RRAM device further includes a switching layer on the electrode structure, where the switching layer has the first width and an oxygen exchange layer, having a second width less than the first width, on a portion of the switching layer. The RRAM device further includes a top electrode above the oxygen exchange layer, where the top electrode has the second width and an encapsulation layer on a portion of the switching layer, where the switching layer extends along a sidewall of the oxygen exchange layer.

Resistive random access memory device and methods of fabrication

An apparatus is provided which comprises: a magnetic junction including: a first structure comprising a magnet with an unfixed perpendicular magnetic anisotropy (PMA) relative to an x-y plane of a device; a second structure comprising one of a dielectric or metal; a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures; a fourth structure comprising an antiferromagnetic (AFM) material, the fourth structure adjacent to the third structure; a fifth structure comprising a magnet with PMA, the fifth structure adjacent to the fourth structure; and an interconnect adjacent to the first structure, the interconnect comprising spin orbit material.

Perpendicular exchange bias with antiferromagnet for spin orbit coupling based memory

A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit coupling material and a perpendicular magnetic tunnel junction (pMTJ) device on a portion of the electrode. The pMTJ device includes a free magnet, a fixed magnet and a tunnel barrier layer in between, where at least one of the fixed magnet or the free magnet includes two magnetic layers and a spacer layer comprising tungsten in between.

Spin orbit torque (SOT) memory devices with enhanced magnetic anisotropy and methods of fabrication

A spin orbit torque (SOT) memory device includes a SOT electrode having a spin orbit coupling material. The SOT electrode has a first sidewall and a second sidewall opposite to the first sidewall. The SOT memory device further includes a magnetic tunnel junction device on a portion of the SOT electrode. A first MTJ sidewall intersects the first SOT sidewall and a portion of the first MTJ sidewall and the SOT sidewall has a continuous first slope. The MTJ device has a second sidewall that does not extend beyond the second SOT sidewall and at least a portion of the second MTJ sidewall has a second slope.

Spin orbit torque (SOT) memory devices and methods of fabrication

An apparatus comprises a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier between the free and fixed layers, the tunnel barrier directly contacting a first side of the free layer, a capping layer contacting the second side of the free magnetic layer and boron absorption layer positioned a fixed distance above the capping layer.

Perpendicular spin transfer torque magnetic mechanism

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Portland, OR, United States of America

Christopher J Wiegand