Cherry Semiconductor Corporation

Christopher J Sanzo

Gedaly Levin

George E Schuellein

Arthur R Theroux

Denis P Galipeau

Richard Patch

A circuit for providing a temperature-compensated reference current, the circuit comprising a current mirror and a V.sub.BE multiplier circuit. The current mirror includes a reference transistor with its collector providing the temperature-compensated reference current. The V.sub.BE multiplier circuit connects together the base and collector of the reference transistor so as to provide a voltage differential in a range of values having a greatest lower bound equal to V.sub.BE, and sinks (or supplies) base current to the reference transistor so that the reference current is not appreciably affected by the base current of the reference transistor.

Temperature compensated current reference

A programmable delay circuit employs a comparator to control an output driver. The comparator compares a ramp signal to an error control signal derived from an error amplifier or in the alternative to a disable signal. The output of the comparator is latched on until a reset signal is received. The reset signal is produced when the ramp signal is discharged below a predetermined level. The programmable delay circuit is useful in a secondary side post regulator to control a totem pole driver. The totem pole driver in turn controls a switching device coupled to a voltage on a secondary winding.

Switch with programmable delay

A programmable delay circuit employs a comparator to control an output driver. The comparator compares a ramp signal with a disable signal or an error control signal derived from an error amplifier. The comparator latches the output on until a reset signal is received. The reset signal is produced when the ramp signal is discharged below a predetermined level. The programmable delay circuit is useful in a secondary side post regulator to control a grounded totem pole driver. The totem pole driver in turn controls a switching device coupled to a voltage on a secondary winding.

A sleep switch connected to a ramp pin, an undervoltage lockout circuit and a hysteretic differential comparator for use in the undervoltage lockout circuit are disclosed. An integrated circuit has a comparator that receives a voltage from the ramp pin which it compares with a control voltage. The sleep switch connected to the ramp pin is activated when the ramp pin is below a predetermined voltage threshold at which point it puts the integrated circuit into a low power consumption sleep mode. The undervoltage lockout circuit includes a detection leg connected between the supply terminal and ground. A current supply is enabled when the voltage across a resistive portion of a detection leg rises above a first threshold. A differential comparator is responsive to the detection voltage for enabling the current supply. The differential comparator may include three transistors arranged to provide first and second detection thresholds so as to establish a hysteresis.

Undervoltage lockout circuit with sleep pin

A totem pole driver with cross conductive protection and default low impedance state output employs a totem pole output formed by top and bottom output transistors. A first circuit path switches the bottom output transistor on or off in response to a switching signal. A second circuit path, slower than the first circuit path, switches the top output transistor on in response to the switching signal after the bottom output transistor is switched off. A third circuit path switches the top output transistor off in response to a sync signal known to lead the switching signal. An emergency voltage supply is made available to hold the bottom output transistor on and the top output transistor off if the regulated circuit voltage is lost.

Totem pole driver with cross conduction protection and default low

A latchable comparator including a comparator and a circuit having a reset input. When the comparator produces a first state, it is latched when the reset input is in the non-reset state. In this state, the comparator receives a comparison signal having a high or low value and a latch signal being outside the range of voltages extending between the low and high values. A reset signal causes the latch signal to be replaced by a comparator reference signal. Further disclosed is a latchable comparator including a comparator and a flip-flop. The comparator has a ramp input, a control input, a first reference input and a second reference input. The flip-flop provides latch signals to each of the first and second reference inputs when its reset input is in the non-reset state and said comparator is generating a first state and maintains the latch signals until a reset signal is received.

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Cranston, RI, United States of America

Christopher J Sanzo