Thorn Emi Plc

Christopher J Morris

Paul W Surguy

Ian Coulson

Colin M Waters

Steven D Bull

Stephen D Bull

Brian J Humphries

The display has a video signal receiver and a store with a capacity to hold one picture of the video signal. Row-output devices enable the video information for respective rows of pixels to be taken out from picture store, and each has a bit extractor to separate out one bit of the information for each pixel of the respective row. The resultant signal is passed to pixel drivers which operates on a lattice formed of ferroelectric liquid crystal pixel-elements, which are time-multiplex addressed according to a predetermined sequence, each row being addressed a plurality of times for each picture. In the addressing groups of the rows are set simultaneously, each group consisting of a plurality of rows spaced apart in the addressing sequence such that the rows in a group form a series with adjacent rows having a temporal separation in the addressing sequence exhibiting a geometric progression with the common ratio N being an integer corresponding to 2 or more.

Display device

A method of operating a display comprising a lattice of pixel elements, includes the step of time-multiplex addressing collections of pixel elements. This addressing step includes using a first shift register means to designate operation of a second shift register means to select a function to be performed. If the second shift register means is in bypass mode, then the first shift register means is effective as a mask to specify which of the stages in the second register means should be bypassed, and allows non-sequential group addressing of the pixel elements. Such an arrangement of first and second shift register means is suitable for use in controlling the addressing of collections or rows of pixel elements; the function to be selected by the second shift register means is the strobing of the collections or rows.

Display device with time-multiplexed addressing of groups of rows of

A drive circuit comprises a first waveform generator and a second waveform generator. Each waveform generator is capable of generating at least two voltage states and the instantaneous voltage of the first waveform is never less than that of the second waveform by more than a defined amount. The circuit further comprises a plurality of means to produce respectively a plurality of output waveforms by selectively switching to either the first waveform or the second waveform and a gate array to control the selective switching. The arrangement is such that each of the plurality of means to produce respectively a plurality of output waveforms is capable of producing an output waveform having at least four voltage states. The drive circuit produces a plurality of outputs suitable for driving a matrix-addressed display.

Drive circuit for providing at least one of the output waveforms having

A display device has a lattice of pixel elements each selectably settable. A method of operating the display device comprises the steps of receiving a signal representing a picture for display during a display period and illuminating the lattice to produce, during a first interval within the display period, a first light output from the lattice having a first predetermined color characteristic and to produce at least one additional light output from the lattice. Each said additional light output has a different predetermined color characteristic and a respective interval within the display period separate from the first interval. The method further comprises the step of time-multiplex addressing blocks of pixel elements a plurality of address times during each interval. The addressing step includes setting a group of blocks, the group consisting of a plurality of blocks spaced apart in the addressing sequence such that the blocks in the group form a series with adjacent blocks having a temporal separation in the addressing sequence exhibiting a geometric progression with a common ratio N being an integer equal to 2 or more. In this way, addressing of the lattice occurs simultaneously with its illumination by the appropriate color, allowing a greater proportion of the frame time for the addressing operation so that additional addressing information can be utilized.

A method is provided for addressing a matrix-array type liquid crystal cell with a ferroelectric liquid crystal layer having a plurality of pixels defined by areas of overlap between members of a first set of electrodes on one side of the liquid crystal layer and members of a second set of electrodes on the other side of the liquid crystal layer, each of the pixels having a first and a second optically distinguishable state and a response time for switching between the two states which depends on the potential difference across the liquid crystal layer. The method includes the step of applying a switching pixel waveform to a selected pixel to switch it between the two states. The switching pixel waveform is charge-balanced and comprises a first pulse having a sufficient pulse width and pulse height magnitude to switch the selected pixel and a second pulse contributing to charge-balancing. The second pulse has a pulse height magnitude greater than the sufficient pulse height magnitude of the first pulse and a pulse width which is insufficient to switch the selected pixel.

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Feltham, United Kingdom

Christopher J Morris