Lattice Semiconductor Corporation

Christopher Hume

Allen White

Hemanshu T Vernenker

Margaret Tait

Nhon Nguyen

Sam Tsai

Tim Swensen

Steve Eplett

John Schadt

Zheng Chen

Louis De La Cruz

Systems and methods disclosed herein provide for variable data width memory. For example, in accordance with an embodiment of the present invention, a technique for doubling a width of a memory is disclosed, without having to increase a width of the internal data path or the number of input/output pads.

Variable data width memory systems and methods

Systems and methods are disclosed herein to provide techniques for writing to certain bits of a word location in a memory. For example, in accordance with an embodiment of the present invention, a method of implementing byte enable logic for a memory is disclosed, with the byte enable logic signals provided on one or more address lines.

Byte enable logic for memory

In accordance with an embodiment of the present invention, a programmable logic device includes a plurality of logic blocks, a plurality of memory blocks, and a plurality of continuation routing paths associated with the memory blocks. A plurality of continuation multiplexers, coupled to the continuation routing paths, are adapted to route signals between the memory blocks, between the logic blocks, and/or between the memory blocks and the logic blocks.

Cascadable memory

In accordance with one embodiment of the present invention, a programmable logic device includes at least one block of memory having a plurality of memory cells and a plurality of fuses adapted to provide a first set of signals that determines a first configuration for the at least one block of memory. A plurality of multiplexers are adapted to select the first set of signals from the plurality of fuses to configure the at least one block of memory in the first configuration or a second set of signals to configure the at least one block of memory in a second configuration.

Initializing memory blocks

Systems and methods provide output data from a memory. For example, in accordance with an embodiment of the present invention, techniques are disclosed for providing glitch-free output data from a memory through feedback of the output data signal.

Memory output data systems and methods with feedback

Systems and methods provide metastability-resistant techniques. For example, in accordance with an embodiment of the present invention, a flip flop is disclosed having a dynamic gain skewed to provide metastability resistance.

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Austin, TX, United States of America

Christopher Hume