Intel Corporation

Hewlett-packard Development Company, L.p.

Christopher Houghton

Hang T Nguyen

Pankaj Kumar

David A Biermann

James J St Laurent

Isaac Kantorovich

Warren Anderson

Stephen C Root

John A Kowaleski

Victor Arnoldovich Drabkin

Herbert R Kolk

In one embodiment, the present invention includes a processor having a plurality of cores and a control logic to control provision of a voltage/frequency to a first core of the plurality of cores independently of provision of a voltage/frequency to at least a second core of the plurality of cores. In some embodiments, the voltages may be provided from one or more internal voltage regulators of the processor. Other embodiments are described and claimed.

Providing per core voltage and frequency control

A system is provided that includes a CPU, a graphical user interface coupled to the CPU, and a memory coupled to the CPU. The memory stores a bump map application and a data extraction application executed by the CPU. The bump map application displays a plurality of editable textual character groups representative of a plurality of bumps. The textual character groups are arranged on the graphical user interface according to a relative coordinate position of the bumps with respect to an origin. The data extraction application automatically extracts data from the bump map application for use by a router application.

Method and system for automatically extracting data from a textual bump map

Various systems, methods, and programs embodied in a computer readable medium are provided for determining a worst-case impedance and worst-case voltage of a power supply loop coupled to a power input of a die. In various embodiments, the worst-case impedance of a power supply loop is determined and a reference voltage at the power input of the die associated with an average current generated at a power supply included in the power supply loop. A maximum change in a current at the power input of the die is also measured and an estimate of a worst-case voltage at the power input of the die is calculated based upon the worst-case impedance, the reference voltage, and the maximum change in the current.

Determination of worst case voltage in a power supply loop

A method comprises generating first and second current levels and measuring the first and second current levels. The method further comprises alternately generating the first and second current levels repeatedly to generate a periodic current waveform, and measuring the voltage at at least one port in a system a plurality of times to obtain a plurality of sets of voltage measurements. The plurality of sets of voltage measurements are averaged. The method further comprises alternately generating the first and second current levels repeatedly at a predetermined number of different clock frequencies, determining a Fourier component of the averaged voltage measurements to determine clock frequency-dependent noises, removing the clock frequency-dependent noises to generate a filtered average voltage, and determining an impedance by dividing a Fourier component of the filtered average voltage by a Fourier component of the periodic current waveform having alternating first and second current levels.

System and method of measuring low impedances

Disclosed are various systems, methods, and programs embodied in computer readable mediums for measuring current in a central processor unit (CPU) package. To measure the current, a voltage V(t) is determined in situ across at a power input of a die in the CPU package while running a computer process on the die. Then, the Fourier transform of the voltage F(V(t)) is calculated from the voltage V(t). The current at the power input of the die in the frequency domain (F(I(t))) can then be calculated from the voltage F(V(t)) and impedance Z, where the impedance Zcomprises an impedance of a power supply loop coupled to the power input as a function of frequency. Finally, the current I(t) at the power input of the die is determined in the time domain by calculating the inverse Fourier transform of the current in the frequency domain F(I(t)).

Measuring current on a die

A method of measuring impedance in a system comprises holding a microprocessor in reset mode and providing a clock to the microprocessor at a frequency FCLK while measuring a first current level, providing the clock at frequency FCLK/N while measuring a second current level, where N is a positive integer, measuring the voltage at a plurality of ports in the system a plurality of times to obtain a plurality of sets of voltage measurements while holding the microprocessor in reset mode, toggling the clock frequency between FOLK and FOLK/N, and generating a periodic current waveform. The voltage measurements are averaged. The method further comprises determining and removing clock frequency-dependent noises to generate a filtered average voltage, and determining an impedance by dividing a Fourier component of the filtered average voltage by a Fourier component of the periodic current waveform having alternating first and second current levels.

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Westborough, MA, United States of America

Christopher Houghton