National Instruments Corporation

Christopher G Regier

Clayton H Daigle

L Rolando Ortega-Pohlenz

Pablo Limon

Lauren Sjoboen

Antony Wangsanata

Blake A Lindell

Bakul Damle

Pablo E Limon-Garcia-Viesca

Luis F Orozco

Scott Borisch

Systems and methods for calibration and operation of a source-measure unit (SMU). The system may include a functional unit and output terminals coupled to the functional unit. An excitation signal may be applied to a capacitor by the SMU. The capacitor may be included in a calibration circuit. The method may include obtaining one or more of a current calibration coefficient (CCC) or a voltage calibration coefficient (VCC). The CCC may correspond to a current-range setting and the VCC may correspond to a voltage-range setting. The CCC may be obtained from a value of a first current and a value of a second current developed in the capacitor responsive to the excitation signal. The VCC may be obtained from a value of a first voltage and a value of a second voltage developed across the capacitor responsive to the excitation signal.

Self-calibration of source-measure unit via capacitor

A source-measure unit (SMU) may be implemented with digital control loops and circuitry to digitally compensate for the impact of input bias current on current measurements. One or more buffers having well-defined characteristics with respect to certain parameters which may affect the current measurements may be used in the output signal path of the SMU where a shunt voltage developed across a current sense element is measured. For example, the buffers may conduct/develop respective input bias currents that change perceptibly and predictably with temperature. By measuring the temperature and adjusting a control voltage&#x2014;which is used to develop the shunt voltage&#x2014;according to the temperature measurements, the impact of the input bias current[s] on the current measurement[s] may be reduced to negligible levels and/or may be eliminated. The control voltage may be adjusted by adjusting a voltage feedback value representative of the measured shunt voltage, and/or by adjusting a current setpoint used for generating the control voltage.

Digitally compensating for the impact of input bias current on current measurements

A single semiconductor-based junction may be used to create a voltage reference, and temperature compensate the voltage reference, by time-multiplexing the voltage reference between different current drive levels. That is, the value of the current driven through the single junction may be repeatedly varied in a recurring manner. In case the junction is a zener diode, the current may be repeatedly switched between forward and reverse directions. As long as the temperature coefficients (in ppm/&#xb0; C.) of the different voltages developed responsive to the different currents across the junction are different, a weighting of the different voltage values yield a zero temperature coefficient voltage reference value. To implement a bandgap reference, a single diode-connected bipolar junction transistor may alternately be forward-biased using a first current and at least a second current. A weighting of the (at least) two resulting Vbe (base-emitter voltage) drops may yield a zero temperature coefficient bandgap voltage.

Single-junction voltage reference

An improved measurement system may include a source measure unit (SMU) capable of performing accurate low-level current measurements. Based on an SMU design that provides a controlled DC voltage source with precision current limiting and a controlled 0V (zero Volt) DC at the measurement terminal, an AC design may be implemented to establish the same (or very similar) conditions over a specified frequency range. Instead of controlling each digital-to-analog converter (DAC) at respective source terminals of the SMU as a respective DC output, each DAC may be controlled as a respective function generator with programmable frequency and continuously variable phase and amplitude. Off-the-shelf pipelined analog-to-digital converters (ADCs) may be used to monitor voltage, current and the voltage at the measurement terminal, and a Fourier transform may be used to obtain both the amplitude and relative phase measurements to be provided to respective control loops.

Digital approach to the removal of AC parasitics for impedance measurements

A hybrid amplifier includes a linear amplifier coupled in series with a switching amplifier. The linear amplifier may generate an intermediate amplified signal according to an input signal. The switching amplifier may generate an output signal according to the intermediate amplified signal, the output signal having an amplitude with respect to a reference voltage provided at a reference node. The linear amplifier may drive the reference node to adjust the reference voltage responsive to transient changes in the output signal. A high-pass filter coupled to the linear amplifier and the switching amplifier may enable the switching amplifier to provide most of the steady-state current, which may drive a load, from actual ground. The linear amplifier and switching amplifier may be independently powered, for example from a power supply having a primary winding and two electrically isolated secondary windings that respectively provide power to the linear amplifier and the switching amplifier.

Efficient low noise high speed amplifier

A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters). The readings obtained by the ADCs may be compared to a setpoint, which may be set in a digital loop controller. The digital loop controller may be used to produce an output to drive a DAC (digital-to-analog converter) until the output voltage and/or output current and/or a function thereof reach the respective desired levels. The digital loop controller may implement respective integrating functions for the respective digital control loops, and may also implement a compensation function featuring pole-zero pairs to stabilize the respective current/voltage outputs. Coefficients of the compensation function may be calculated based on user programmable parameters corresponding to the gain bandwidth product, compensation frequency, and ratio of the added pole-zero frequencies.

Compensation methods for digital source-measure-units (SMUs)

A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters). The readings obtained by the ADCs may be compared to a setpoint, which may be set in a digital loop controller (DLC). The DLC may be used to produce an output to drive a DAC (digital-to-analog converter) until the output voltage and/or output current and/or a function thereof reach the respective desired levels. The DLC may perform a threshold check to determine if the output current is outside a specified measurable range, and generate an override signal to drive the DAC to rapidly return the output current to the measurable range. Once the current is within the measurable range, the DAC may once again be driven according to the respective digital control loops for the output voltage and the output current.

Fast current saturation recovery for a digital source measure unit (SMU)

A source-measure unit (SMU) may be implemented with digital control loops. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters), and the readings obtained by the ADCs may be compared to a setpoint in a digital loop controller, which may produce an output to drive a DAC (digital-to-analog converter) to maintain the output voltage and/or output current at a desired setpoint. The digital loop controller may also digitally implement simulated resistance with high resolution, accuracy, and range, using Th&#xe9;venin and Norton power supply models. Simulated resistor values may range from 10&#x3a9; to 10&#x3a9; for output currents in the 100 mA range, with a sub-200&#x3bc;&#x3a9; resolution. The range may be expanded up to 100 k&#x3a9; for output currents in the 10 &#x3bc;A range. The Norton and Th&#xe9;venin implementations may be combined, and a 'pure resistance' mode may be created for simulating any desired resistance value. A variation of the general resistance-simulation technique may also be used to compensate for Common Mode Voltage effects in the current measurement path, providing tighter output and measurement specifications at a lower component cost.

Resistance simulation and common mode rejection for digital source-measure units

A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The digital control loop associated with the output that is being regulated may be the setpoint control loop while the digital control loop associated with the other output may be the compliance control loop. The digital loop controller may switch between the setpoint control loop and the compliance control loop without generating a mode-change glitch, by maintaining a single integrator. The compliance methods may differ in how and when the decision is made to select which of the measured signals provides the error signal to the integrator. Thus, there may be no issue with integrator wind-up, which might be the case if there were two complete control loops operating continuously.

Compliance methods for source measure units operating with digital control loops

A source-measure unit (SMU) may be implemented with a control loop configured in the digital domain. The output voltage and output current may be measured with dedicated ADCs (analog-to-digital converters). The readings obtained by the ADCs may be compared to a setpoint, which may be set in an FPGA (field programmable gate array) or DSP (digital signal processing) chip. The FPGA or DSP chip may then be used to produce an output to drive a DAC (digital-to-analog converter) until the output voltage and/or output current reach the respective desired levels. The readback values may be obtained by averaging the voltage and/or current readings provided by the ADCs. The averaging may be weighted to improve noise rejection. The digital control loop provides added flexibility to the SMU and a decrease in the accuracy requirements on the DAC, while also for solving potential range-switching issues that may arise within the SMU.

Source-measure unit based on digital control loop

A front-end circuit suitable for digital multimeters and measurement devices may be configured with strictly capacitive attenuators replacing the resistive attenuators in the AC signal path. An inverting programmable-gain amplifier (PGA) may be built around an operational amplifier (op-amp), with a single resistor for DC feedback providing a 1-order response for AC coupling. The single resistor may be replaced by a more complex RC network to provide a 2-order response. The feedback circuit may also include active components such as additional op-amps, which may assist in shaping the overall response and/or reducing the DC offset at the output of the circuit. The capacitive load presented to the input by the front-end circuit may be minimized to compare to capacitances present in resistive implementations. The circuit would not present a DC load to the input since DC loads are typically the result of a resistive attenuator in the DC signal path.

AC amplifier for precision measurement

In one embodiment, a differential filter is configured using a differential operational amplifier (op-amp) with two feedback RC networks, each RC network coupled between a respective input and a respective output of the op-amp. Two capacitive elements may each provide mid-band positive feedback from a respective output of the op-amp to the midpoint of a respective corresponding resistive element, where each resistive element is coupled to a respective input of the op-amp. The mid-band positive feedback may operate to convert a first-order response of the filter to a second-order response. In one set of embodiments, dielectric absorption (DA) cancellation may be implemented with positive RC feedback from a divided version of a respective one of the op-amp outputs. For cascaded filters, DA cancellation may be implemented with positive RC feed-forward. Transistors coupled across the feedback RC networks may be used to disable the filter, decoupling the filter from other circuit components when the filter is not in use.

Differential filter topology with dielectric absorption cancellation for a data acquisition device

In one embodiment, a programmable gain instrumentation amplifier (PGIA) comprises a pair of current conveyors, each current conveyor having a respective sense node and a respective voltage input, with a gain-setting resistor coupled between the respective sense nodes, and current being sensed on both sides of the gain setting resistor. In one embodiment, each current conveyor comprises a corresponding operational amplifier (op-amp) having a non-inverting input configured as the respective voltage input that may receive a respective input voltage signal, an output and an inverting input, with a respective current conveying element, which may be a FET, configured in a feedback loop between the output and the inverting input. Each current conveyor may be configured to sense a corresponding current flowing through its respective FET, with the corresponding currents forming a differential output current of the PGIA. The respective input voltage signals received by the respective voltage inputs may form a differential input voltage of the PGIA. In one set of embodiments, the PGIA may be implemented with a differential voltage output, leading to an increased output swing for higher signal-to-noise ratio and increased symmetry for a higher common mode rejection ratio.

Differential structure programmable gain instrumentation amplifier

In one embodiment, a programmable gain instrumentation amplifier comprises an input stage configured with a differential precision current conveyor circuit. The current conveyor circuit may be implemented with operational amplifiers coupled to gain-setting resistors, with double-multiplexers configured on each end of the gain-setting resistors. In a first set of embodiments, the double-multiplexers may be bootstrapped, whereby the power supplies of each double-multiplexer may track the signals on the output pin of a respective sense-multiplexer component of the double-multiplexer. In a second set of embodiments, the power supplies may alternatively track the op-amp differential output during non-overload conditions, or the op-amp common-mode output at a gain resistor center tap during overload conditions. Corresponding bootstrap circuits may be designed for both sets of embodiments, the bootstrap circuits coupling to the respective tracking node or nodes in either case.

Growing community of inventors

Cedar Park, TX, United States of America

Christopher G Regier