Northrop Grumman Systems Corporation

Christopher F Kirby

Michael Rennie

Daniel J O'Donnell

Aurelius L Graninger

Harvey C Nathanson

Brian Paul Wagner

Sandro J Di Giacomo

Vivien M Luu

Robert Samuel Howell

Aaron A Pesetski

Robert Miles Young

Garrett A Storaska

Thomas J Knight

Joseph Terence Smith

James T Kelliher

Sean R McLaughlin

Robert Tranchini

Khyhouth Lim

Sean R Mclaughlin

Daniel J O'donnell

Daniel J O'DONNELL

A method of forming a superconductor structure is disclosed. The method comprises forming a superconductor line in a first dielectric layer, forming a resistor with an end coupled to an end of the superconductor line, and forming a second dielectric layer overlying the resistor. The method further comprises etching a tapered opening through the second dielectric layer to the resistor, and performing a contact material fill with a normal metal material to fill the tapered opening and form a normal metal connector coupled to the resistor.

Superconductor structure with normal metal connection to a resistor and method of making the same

A method is provided of forming a superconductor device interconnect structure. The method comprises forming a first dielectric layer overlying a substrate and forming a superconducting interconnect element in the first dielectric layer. The superconducting interconnect element includes a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer. The superconductor device interconnect structure is moved into a dielectric deposition chamber. The method further comprises performing a cleaning process on a top surface of the first interconnect layer in the dielectric deposition chamber to remove oxidization from a top surface of the first interconnect layer, and depositing a second dielectric layer over the first interconnect layer in the dielectric deposition chamber.

Preclean and dielectric deposition methodology for superconductor interconnect fabrication

A method of forming a superconductor interconnect structure is disclosed. The method includes forming a dielectric layer overlying a substrate, forming an interconnect opening in the dielectric layer, and moving the substrate to a deposition chamber. The method further includes depositing a superconducting metal in the interconnect opening, by performing a series of superconducting deposition and cooling processes to maintain a chamber temperature at or below a predetermined temperature until the superconducting metal has a desired thickness, to form a superconducting element in the superconductor interconnect structure.

Deposition methodology for superconductor interconnects

A method of forming a superconductor device structure is disclosed. The method comprises forming a base electrode in a first dielectric layer, forming a junction material stack over the base electrode, forming a hardmask over the junction material stack, etching away a portion of the junction material stack to form a Josephson junction (JJ) over the base electrode, and depositing a second dielectric layer over the hardmask, the JJ, the base electrode and the first dielectric layer. The method additionally comprises forming a first contact through the second dielectric layer to the base electrode to electrically couple the first contact to a first end of the JJ, and forming a second contact through the second dielectric layer and the hardmask to electrically coupled the second contact to a second end of the JJ.

Method of making a superconductor device

A method of forming a superconductor structure is provided. The method comprises forming a superconducting element in a first dielectric layer that has a top surface aligned with the top surface of the first dielectric layer, forming a second dielectric layer over the first dielectric layer and the superconducting element, and forming an opening in the second dielectric layer to a top surface of the superconducting element. The method also comprises performing a cleaning process on the top surface of the superconducting element to remove oxides formed on the top surface of the superconducting element at a first processing stage, forming a protective barrier over the top surface of the superconducting element, and moving the superconductor structure to a second processing stage for further processing.

Method of forming superconductor structures

A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a superconducting interconnect element in a first dielectric layer, such that the superconducting interconnect element has a top surface aligned with a top surface of the first dielectric layer to form a first interconnect layer. The method also includes performing a plasma clean on a top surface of the first interconnect layer, and depositing a second dielectric layer over the first dielectric layer.

Preclean methodology for superconductor interconnect fabrication

A method is provided of forming a superconductor interconnect structure. The method comprises forming a dielectric layer overlying a substrate, forming an interconnect opening in the dielectric layer, and moving the substrate to a deposition chamber. The method further comprises performing a cleaning process on the top surface of the dielectric layer and in the interconnect opening while in the deposition chamber, and depositing a superconducting metal in the interconnect opening while in the deposition chamber to form a superconducting element in the superconductor interconnect structure.

Preclean and deposition methodology for superconductor interconnects

A method is provided of forming a superconductor device interconnect structure. The method includes forming a first high temperature dielectric layer overlying a substrate, forming a base electrode in the first high temperature dielectric layer with the base electrode having a top surface aligned with the top surface of the first high temperature dielectric layer, and depositing a second high temperature dielectric layer over the first high temperature dielectric layer and the base electrode. The method further comprises forming a first contact through the second dielectric layer to a first end of the base electrode, forming a Josephson junction (JJ) overlying and in contact with the first contact, and forming a second contact through the second dielectric layer to a second end of the base electrode.

Superconductor device interconnect

A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a base electrode in the first dielectric layer with the base electrode having a top surface aligned with the top surface of the first dielectric layer. The method further comprises forming a Josephson junction (JJ) over the base electrode, depositing a second dielectric layer over the JJ, the base electrode and the first dielectric layer, and forming a first contact through the second dielectric layer to the base electrode to electrically couple the first contact to a first end of the JJ, and a second contact through the second dielectric layer to a second end of the JJ.

Superconductor device interconnect structure

Photo-conducting infrared sensors are provided including a substrate (e.g., silicon) with one or more trenches formed on a first surface. An infrared-reflective film can be deposited directly or indirectly onto and conforming in shape with the first surface of the substrate. A lead chalcogenide film can be deposited directly or indirectly over the top of the infrared-reflective film and conforming in shape with the first surface of the substrate. Accordingly, the infrared-reflective film is directly or indirectly sandwiched between the substrate and the lead chalcogenide film.

Infrared multiplier for photo-conducting sensors

A device includes a coiling layer, a circuit device layer and active microelectronic circuitry fabricated on the circuit device layer. The coiling layer is formed onto a surface of and coupled to the circuit device layer. The coiling layer having intrinsic stresses which cause coiling of the coiling layer and the circuit device layer including the microelectronic circuitry as the circuit device layer is released from an underlying substrate. A coiled circuit device is formed.

Coiled circuit device with active circuitry and methods for making the same

A MEMS device having a support frame positioned on a substrate surrounding a first electrode. A rigid flange portion at the top of the support frame is closely space from, and is connected to, a second electrode by relatively short spring members. RF conductors connected to respective first and second electrodes complete an RF switch. A dielectric layer on the first electrode forms a capacitive type device and includes an electrostatic shield layer on its surface. This electrostatic shield layer is connected to ground by a multi megohm bleeder resistance.

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Gambrills, MD, United States of America

Christopher F Kirby