Level One Communications, Inc.

Avnera Corporation

Intel Corporation

Zeevo, Inc.

Christopher Donald Nilson

Thomas Byunghak Cho

Srenik Suresh Mehta

Thomas G McKay

Michael Peter Mack

Shahriar Rabii

Menno Marringa

Donald Evan Macnally

Laurence Marguerite Plouvier

Eric S Dukatz

A start-up circuit for a bandgap reference voltage generator circuit, including a first native transistor with a drain connected to a supply voltage of the bandgap reference voltage generator circuit and a source connected to a gate of the first native transistor; a low voltage transistor with a source connected to ground, a drain connected to the source of the first native transistor, and a gate connected to a resistor; a second native transistor with a source connected to the resistor, a gate connected to the source of the first native transistor; a high voltage transistor with a drain connected to a drain of the second native transistor and a source connected to the supply voltage; and a transistor with a gate connected to the gate of the first high voltage transistor and a drain which provides a start-up current for the bandgap reference voltage generator circuit.

Wide supply range precision startup current source

A current-mode, digital-to-analog converter (DAC) configured to convert a digital word input having j bits to an analog signal. The DAC has 2current sources, an output node, a current divider, a first switch, and a second switch. Each of the 2current sources is configured to produce a current having a value I. The current divider has a programmable divide ratio, d, where 1/d is between 0 and 1. The first switch is configured to selectively couple 2&#x2212;1 of the 2current sources to the output node. One of the 2current sources is not coupled to the output node. The second switch is configured to selectively couple each of the 2j current sources to the current divider. This architecture ensures that the fundamental transform of input code to output current always has a slope that does not change from positive to negative or from negative to positive.

Architecture for ensuring monotonicity in a digital-to-analog converter

A multistage analog circuit for independently controlling a bias current in each stage of the multistage analog circuit having an input stage, an intermediate stage, and an output stage, includes a first current source which controls the input stage of the circuit, a second current source which controls the intermediate stage of the circuit, and a third current source which controls the output stage of the circuit. The bias current in each stage of the circuit is set by the first, second, and third current sources. An output voltage of the circuit is capable of remaining the same when the first current source is changed to affect an input transconductance of the circuit.

Bias technique for operating point control in multistage circuits

A single-chip CMOS direct conversion transceiver includes an RF circuit, a transmitter having a synthesizer, a receiver having a baseband filter, and a demodulator. The synthesizer is coupled to the RF circuit. The baseband filter is coupled to the RF circuit and the synthesizer. The demodulator is coupled to the baseband filter. The RF circuit, the synthesizer, the baseband filter, and the demodulator are arranged and configured in CMOS devices and provide a complete interface between an antenna and a voiceband codec.

Single-chip CMOS direct-conversion transceiver

Disclosed is a frequency conversion circuit with sideband suppression in which a first mixer receives an in-phase signal (IF ) and is driven by a local oscillator having an in-phase (0&deg;) oscillator signal (LO ), and produces two sideband signals (LO&plus;IF, LO&minus;IF). A second mixer receives a quadrature phase frequency signal (IF &plus;) and is driven by a local oscillator having a quadrature (180&deg;) oscillator signal (LO ), and produces two sideband signals (LO&plus;IF , LO&minus;IF ). One of the sidebands from the second mixer is 180&deg; out of phase with respect to the same sideband from the first mixer. A signal combiner then receives and combines the two sidebands from the first mixer and the two sidebands from the second mixer, the signal combiner suppressing one sideband and enhancing the other sideband. In preferred embodiments, the mixers comprise MOSFET transistors and the signal combiner comprises capacitive elements.

CMOS frequency conversion using dual mixers for sideband suppression

Disclosed is a CMOS transistor amplifier for small RF signals which operates in a Class AB mode. The serially connected P channel and N channel transistors of the CMOS transistor pair have DC bias voltages applied to the control gates, and the small input signal is capacitively coupled to the gates of the CMOS transistor pair. In a preferred embodiment, the DC voltage bias for the P channel transistor is derived from a second P channel transistor which is approximately identical to the first P channel transistor in structure with the second P channel transistor serially connected with the current source and the voltage at the gate/drain of the transistor resistively coupled to the gate of the first P channel transistor. Similarly, the second bias circuit comprises a second N channel transistor which is approximately identical in structure to the first N channel transistor with the second N channel transistor serially connected with a current source and the bias voltage taken at the gate/drain of the second N channel transistor. The bias voltage is then applied through resistive means to the gate of the first N channel transistor.

Efficient AC coupled CMOS RF amplifier

A VCO system for equalizing a positive frequency deviation and a negative frequency deviation by using two varactors is described. The VCO system includes an active circuit and an oscillating circuit. The active circuit includes a first input, a second input coupled to ground and an output. The oscillating circuit is coupled to the output of the active circuit, including: a first varactor controlled by a first variable voltage; a second varactor controlled by a second variable voltage, connected in parallel to the first varactor; and an inductor connected in parallel to the first varactor and to the second varactor. An output signal of the oscillating circuit is fed back to the first input of the active circuit. The output signal of the oscillating circuit has a variable frequency in response to first and second variable voltages of the first and second varactors, respectively.

Linearization scheme for voltage controlled oscillator

A conversion circuit in a transceiver system is capable of converting a single-ended input voltage signal to balanced differential output signals. An input voltage signal can be referenced to the ground (zero voltage) GND and can travel both above and below the zero voltage. A plurality of feedback circuits, having a plurality of transistors and a plurality of resistances, disposed and coupled in a mirror image, to boost an input impedance to an output impedance of a gain of one of the transistors, to isolate an output load from an input of the conversion circuit, and to provide a voltage gain from the input to an output determined by the plurality of resistances.

Growing community of inventors

San Jose, CA, United States of America

Christopher Donald Nilson