Silicon Wave, Inc.

Christopher Dennis Hull

James D Seefeldt

Lars Henrik Mucke

Lars G Jansson

Michael Librizzi

Andrew Xavier Estrada

Mark Vernon Lane

Terrance Raymond Bourk

Jorge Alberto Grilo

Stephen J Brown

Patrick Joseph Murphy

Steven R Norsworthy

Kishore V Seendripu

A novel trench isolated guard ring region for providing RF isolation is disclosed. The semiconductor integrated circuit (IC) device of the present invention comprises a substrate, an insulating layer formed on the substrate, a buried layer formed on the insulating layer, and an epitaxial layer of a first conductivity type formed on the buried layer. A first isolation trench is formed in the epitaxial layer and the buried layer that extends to the insulating layer and that surrounds a first selected surface area of the epitaxial layer. A second isolation trench is formed in the epitaxial layer and the buried layer that extends to the insulating layer and that surrounds the first isolation trench and defines a guard ring region between itself and the first isolation trench. A plurality of isolation chambers is formed within the first and second isolation trenches. A collector is implanted into the epitaxial layer in the guard ring region. A contact is made to the collector, and a conductor connects the contact to a ground node.

Multi-chambered trench isolated guard ring region for providing RF isolation

An apparatus for receiving signals includes a low noise amplifier (LNA) configured to receive a radio frequency (RF) signal. An I/Q direct down converter is coupled to the LNA. The I/Q direct down converter is configured to split the RF signal into real and imaginary components and to down convert the real and imaginary components directly to baseband signals. A local oscillator (LO) is coupled to the I/Q direct down converter and is configured to drive the I/Q direct down converter. First and second filters are coupled to the I/Q direct down converter. The first and second filters are configured to filter the down converted real and imaginary components, respectively. First and second analog-to-digital converters (ADCs) are coupled to the first and second filters, respectively. The first and second ADCs are configured to convert the real and imaginary components into digital signals. The first and second ADCs have a dynamic range that is wide enough to convert the filtered, down converted real and imaginary components to digital signals without using variable gain on the filtered and down converted real and imaginary components. An apparatus for use in wireless communications includes a radio, a modem and a controller integrated onto a single integrated circuit (IC). The radio includes a receiver for receiving data and a transmitter for transmitting data. The modem is coupled to the radio and is configured to demodulate received data and modulate data for transmission. The controller is coupled to the modem and includes a digital interface for external communications through which received data and data for transmission is sent, a connection state machine configured to accept commands through the digital interface and to respond to the commands by initiating a sequence, and a receive/transmit state machine configured to perform state control of the radio in response to the initiated sequence.

Apparatus and method for wireless communications

An integrated circuit inductor structure that includes a shielding pattern that induces a plurality of small eddy currents to shield the magnetic energy generated by the inductor from the substrate of the IC. The IC inductor structure is formed on a Silicon on Insulator (SOI) substrate where the substrate of the SOI has high resistivity. The shielding pattern forms a checkerboard pattern that includes a plurality of conducting regions completely isolated from each other by oxide material. The inductor has a high quality factor and a high self-resonance frequency due to the effective shielding of electromagnetic energy from the substrate of the IC while not reducing the effective inductance of the inductor.

Integrated circuit inductor with high self-resonance frequency

A method and apparatus for fully integrating a Voltage Controlled Oscillator (VCO) on an integrated circuit. The VCO is implemented using a differential-mode circuit design. The differential-mode implementation of the VCO preferably comprises a differential mode LC-resonator circuit, a digital capacitor, a differential pair amplifier, and a current source. The LC-resonator circuit includes at least one tuning varactor and two high Q inductors. The tuning varactor preferably has a wide tuning capacitance range. The tuning varactor is only used to &ldquo;fine-tune&rdquo; the center output frequency f,of the VCO. The center output frequency f,is coarsely tuned by the digital capacitor. The VCO high Q inductors comprise high gain, high self-resonance, and low loss IC inductors. The IC VCO is fabricated on a high resistivity substrate material using a trench isolated guard ring. The guard ring isolates the fully integrated VCO, and each of its component parts, from RF signals that may be introduced into the IC substrate by other devices. By virtue of the improved performance characteristics provided by the digital capacitor, the analog tuning varactor, the high Q inductor, and the trench isolated guard ring techniques, the inventive VCO is fully integrated despite process variations in IC fabrication.

Method and apparatus for fully integrating a voltage controlled oscillator on an integrated circuit

A method and apparatus for digitally controlling the capacitance of an integrated circuit device using MOS-FET devices. In accordance with one aspect of the present invention, a one-bit or &ldquo;binary&rdquo; varactor is presented wherein the gate-to-bulk capacitance of the MOS-FET device exhibits dependency to a D.C. voltage applied between its gate and well implant regions. The capacitance-voltage characteristic of the binary capacitor has three major regions: (1) a first relatively flat region having little or no voltage dependency and having a capacitance equal to a first low capacitance of C,; (2) a sloped region wherein a voltage dependency exists; and (3) a second relatively flat region where there is little or no voltage dependency and where the capacitance equals a second higher capacitance of C,. The capacitance of the binary capacitor can be changed from C,to C,simply by changing the polarity of the applied D.C. voltage from a positive to a negative value. A plurality of binary capacitors are configured in a parallel arrangement to produce a digitally controlled capacitor. The digitally controlled capacitor can be used in any integrated circuit requiring a tightly controlled tuned network. One application is a voltage-controlled oscillator (VCO) wherein the center output frequency of the VCO is calibrated by digitally modifying the capacitance of the VCO's digitally controlled capacitor. A means for determining whether the VCO requires calibration and a means for calibrating the center output frequency of the VCO is presented.

Method and apparatus for digitally controlling the capacitance of an integrated circuit device using mos-field effect transistors

Integrated circuit varactor structures that include either an P-gate/N-well or N-gate/P-well layer configuration formed on an SOI substrate. The varactor structure is completely electrically isolated from the substrate of the IC by an oxide layer of the SOI substrate and by oxide-filled trenches formed on both sides of the varactor structures. The isolation trenches preferably extend to the oxide layer of the SOI substrate. The P-gate/N-well varactor structure includes N,implant regions formed in an N-well implant layer of the varactor. The N,implant regions comprise the source and the drain of a varactor. A LOCOS layer may be formed over the N-well layer where the P-gate is formed over the LOCOS layer. The P-gate may be formed of polysilicon. The N-gate/P-well varactor structure includes P,implant regions formed in a P-well implant layer of the varactor. The P,implant regions comprise the source and the drain of a varactor. A LOCOS layer may be formed over the P-well layer where the N-gate is formed over the LOCOS layer. The N-gate may be formed of polysilicon. The P-gate/N-well varactor is ideally suited for use as a binary or digitally-controlled varactor because it abruptly changes from a first lower capacitance of C,to a second higher capacitance of C,as the D.C. control voltage is varied from a first to a second threshold level. In contrast, the N-gate/P-well varactor finds utility as an analog timing varactor of a fully integrated VCO device, for example, because it slowly changes from a first lower capacitance of C,to a second higher capacitance of C,as the D.C. control voltage is varied from low to high threshold voltage levels.

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San Diego, CA, United States of America

Christopher Dennis Hull