Hewlett-packard Development Company, L.P.

Compaq Computer Corporation, Inc.

Hewlett Packard Enterprise Development LP

Compaq Information Technologies Group, L.p.

Compaq Information Techniques Group, L.p.

Christopher D Voltz

John W Frederick

Drew S Johnson

John C Barker

Louis E Leclerc

Clinton B Yearwood

Montgomery C McGraw

Kevin J Brusky

Ralph K Williamson

Elizabeth A Richard

A technique includes communicating with a plurality of input/output (I/O) modules to cause a firmware image to be transferred to the I/O modules. The I/O modules are each associated with the plurality of storage device enclosures, and the I/O modules are serially coupled together in a chain establishing a processing order among the I/O modules. The technique includes rebooting the I/O modules to cause the I/O modules to use the communicated firmware images, where the rebooting includes rebooting the I/O modules in a second order counter to the processing order.

Updating firmware images on chained input/output (I/O) modules

A method and system of measuring a frame rate with an imaging device may include, capturing images of a number of frames of at least a portion of a series of frames output on a display device, determining if consecutive images of the captured images are different.

Frame rate measurement

A source unit has a video source, a digital audio source, a DDC/CI communications capability and a switch for coupling a pin of a standard video cable either to the digital audio source or to a non-audio conventional connection. A display device has a video consumer, a digital audio consumer, a DDC/CI communications capability and a switch for coupling the pin of the standard video cable either to the digital audio consumer or to a non-audio conventional connection. The switch in the display device is responsive to a DDC/CI command.

Audio over a standard video cable

A display device output adjustment system comprises an electronic device having a visual adjustment module configured to automatically adjust a size of visual content displayed on a display device coupled to the electronic device based on a comparison between at least one characteristic of the display device and a desired output value.

Display device output adjustment system and method

An image display adjustment system comprises a display setup application executable by a processor and configured to, in response to detecting at least one characteristic associated with a display device, automatically cause an adjustment image to be displayed on the display device and an image adjustment process to be performed for the display device using the adjustment image.

Image display adjustment system and method

A source unit is configured to receive its main power supply from pinof a DVI-compliant cable connector. A display device is operable to connect its power supply to pinof a DVI-compliant cable connector to accommodate the main power requirements of a source unit.

Supplying power from a display device to a source using a standard DVI video cable

A copy protection method and apparatus is provided to inhibit unauthorized viewing or copying of a video signal. A varying set of additional or invalid video pulses are generated onto a typical video signal. A pulse sequence identifier identifies the location of the invalid or additional pulses and is likewise generated onto the video signal prior to the occurrence of the identified pulses. The combined signal is received at an authorized display which then decodes or filters the additional or invalid portion of the video signal from the original signal according to a decode protocol stored in local memory. A resultant video output signal is guaranteed from only the original signal.

Copy protection for analog video signals from computing devices

In one embodiment, a system and method for overriding an ejection lock pertain to detecting manipulation of an ejection control element signaling an intent to override the ejection lock, and overriding the ejection lock to enable storage medium ejection.

Systems and methods for overriding an ejection lock

A speaker includes at least one transducer and at least one memory device. The at least one transducer is adapted to receive an audio signal. The at least one memory device is adapted to store data related to the speaker. A method includes reading data from a memory device of at least one speaker. An audio signal is provided from an audio system.

Plug and play compatible speakers

A simulated burst gate signal and a video synchronization key are generated. A video decoder generates a horizontal sync pulse which is programmed to envelop a color burst, thereby simulating a burst gate signal. The offset to the horizontal sync pulse due to simulating a burst gate signal may be compensated at a video memory subsystem receiving the horizontal sync signal, in order to determine when active pixels are provided by the video decoder. Alternatively, counter circuitry external to the video decoder may be used to generate a simulated burst gate signal by counting the number of pixel clock cycles between the horizontal sync pulse and the color burst. Unlike a burst gate signal generated within a video decoder for use with color separation circuitry in the video decoder, a simulated burst gate signal allows for use of color separation circuitry external to the video decoder. Detecting a color burst using external color separation circuitry is thus also disclosed. The programmable horizontal sync pulse of a video decoder is capable of being programmed and later compensated. The programmable horizontal sync pulse thus may also be used as a synchronization key for video devices.

Simulated burst gate signal and video synchronization key for use in video decoding

A home entertainment appliance includes a computer system and a television system. A video monitor or television monitor of the home entertainment system shows a sequence of video frames generated in the appliance based upon at least one received sequence of interlaced video fields each containing a number of scan lines. A video system of the appliance receives a first field, temporarily stores the first field in an input buffer, and then in a loop, while video fields are being received, performs various other steps. The other steps include receiving a next field, compensating the field in the input buffer, deinterlacing the received field with the compensated field in the input buffer, temporarily storing the received field, merging the received field and the compensated field into a video frame of the second sequence, and providing the video frame of the second sequence to a subsequent device. Compensating, when performed, may be accomplished by shifting the position of one of the fields downward with respect to the field as it is received, or may be accomplished by delaying the field until the next field is received.

Method and apparatus for display of interlaced images on non-interlaced display

A home entertainment appliance includes a computer system and a television system. A video monitor or television monitor of the home entertainment system shows a sequence of video frames generated in the appliance based upon at least one received sequence of interlaced video fields each containing a number of scan lines. A video system of the appliance receives a first field, temporarily stores the first field in an input buffer, and then in a loop, while video fields are being received, performs various other steps. The other steps include receiving a next field, compensating the field in the input buffer, deinterlacing the received field with the compensated field in the input buffer, temporarily storing the received field, merging the received field and the compensated field into a video frame of the second sequence, and providing the video frame of the second sequence to a subsequent device, compensating, when performed, may be accomplished by shifting the position of one of the fields downward with respect to the field as it is received, or may be accomplished by delaying the field until the next field is received.

A computer system includes a graphics controller with a first refresh rate and a first horizontal synchronization signal; a secondary source of video data having a second refresh rate and a second horizontal synchronization signal; and a genlock unit for reconciling the first refresh rate of the graphics controller with the second refresh rate of the secondary source. The genlock unit outputs a clock signal with a frequency modulated to reconcile the first refresh rate and the second refresh rate by monitoring the phase differences of the first horizontal synchronization signal and the second horizontal synchronization signal in response to a first control signal and outputs a clock signal at a frequency corresponding to a selected clock frequency in response to a second control signal.

Hardware system for genlocking

According to the present invention, an apparatus having a plurality of independently operable and powerable devices is disclosed. The apparatus includes a plurality of power rails, a plurality of ground planes, and a power management circuit. One of the power rails is associated with one of the plurality of independently operable devices. One of the plurality of ground planes is selectively associated with one or more of the plurality of power rails. The power management circuit couples to the plurality of power rails and the second plurality of ground planes, for selectively deactivating at least one of the plurality of ground planes independently of any of the other plurality of power rails.

Growing community of inventors

Spring, TX, United States of America

Christopher D Voltz