Google Inc.

Goodle Inc.

Christopher Craik

Romain P Guy

Teng-Hui Zhu

Disclosed are apparatus and methods for rendering using a graphics processing component (GPC). A computing device can receive instructions for a GPC, including an instruction IA associated with a first portion of a canvas. An insertion position in an instruction buffer for instruction IA can be determined by: determining an instruction IB in the instruction buffer that is associated with a second portion of the canvas. If the first and second portions overlap, the insertion position can be based on an overlapping-instruction position of IB in the instruction buffer. Otherwise, if instructions IA and IB are similar, then the insertion position can be based on a second position of IB in the instruction buffer. Otherwise, the insertion position can be determined based on an ending position of the instruction buffer. Instruction IA can be inserted in the instruction buffer at the insertion position.

Overlap aware reordering of rendering operations for efficiency

Methods and apparatus are provided for displaying shadows of circular light sources. A computing device can determine a light source and an occluding polygon that is between the light source and a receiver surface, where the occluding polygon includes vertices connected by edges. The computing device can determine a shadow of the occluding polygon on the receiver surface by at least: determining, for a particular vertex, a projection vertex on the receiver surface by projecting a ray from the center point through the particular vertex; determining an outline polygon based on the projection vertex; determining a projection circle around the projection vertex; determining a penumbra of the shadow based on exterior tangents outside of the outline polygon; and determining an umbra of the shadow based on interior tangents inside the outline polygon. The computing device can display at least part of the shadow.

Efficient computation of shadows for circular light sources

Disclosed are apparatus and methods for tessellating shapes. A computing device that has a display can receive an instruction to draw a shape. The computing device can determine a scale factor for the shape. The computing device can determine a set of polygons that tessellate the shape based on the scale factor. The set of polygons can include at least two polygons. The computing device can display the polygons in the determined set on the display.

On-demand transformation aware shape tessellation

A computer-implemented technique includes determining whether to first render an image at a first quality or a second quality based on whether a viewable portion of the image is moving within an image space, a second quality being less than the first quality. The technique further includes first rasterizing the image at the first or second quality based on the determination and first rendering the image at the first or second quality based on the determination. Additionally, the technique includes second rasterizing the image at the other of the first or second quality based on the determination and second rendering the image at the other of the first or second quality based on the determination.

Techniques for rendering images in a tiled view

Disclosed are apparatus and methods for rendering using a graphics processing component (GPC). A computing device can receive GPC instructions, with each instruction associated with a portion of a canvas. For each instruction: a first portion of the canvas can be determined and an instruction buffer can be searched to identify a mergeable instruction for the instruction. After identifying the mergeable instruction at a mergeable position within the instruction buffer, one or more instructions in the instruction buffer that include the mergeable instruction can be searched for overlap in the canvas with the first portion. In the event that the one or more instructions do not overlap with the first portion of the canvas, then the instruction can be merged with the mergeable instruction. Each instruction in the instruction buffer can be provided to the GPC for performing the instruction.

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Berkeley, CA, United States of America

Christopher Craik