Tokyo Electron Limited

Tokyo Electron Limi Ted

Christopher Cole

Akiteru Ko

Angelique Denise Raley

Andrew W Metz

Eric Chih-Fang Liu

Katie Lutker-Lee

Xinghua Sun

Steven Grzeskowiak

Qiaowei Lou

Daniel Santos Rivera

A method of processing a substrate that includes: forming recesses in a first mask layer over a mask stack including a lower hardmask, a middle mask, and an upper hardmask, the recesses defining an initial pattern including a plurality of spacer structures, each of the spacer structures having a first sidewall and an opposite second sidewall, the first sidewall having a different height from the second sidewall; etching the upper hardmask, selectively to the middle mask, to transfer the initial pattern to the upper hardmask; etching the middle mask, selectively to the lower hardmask and the patterned upper hardmask, to transfer a pattern of the patterned upper hardmask to the middle mask; and etching the lower hardmask, selectively to the patterned middle mask, to transfer a pattern of the patterned middle mask to the lower hardmask.

Double hardmasks for self-aligned multi-patterning processes

A substrate processing method is described for etching silicon carbide films for resist underlayer applications. The method includes providing a substrate containing a silicon carbide film thereon, and a photoresist layer defining a pattern over the silicon carbide film, plasma-exciting an etching gas containing a fluorocarbon-containing gas and an oxygen-containing gas, and exposing the substrate to the plasma-excited etching gas to transfer the pattern to the silicon carbide film, where at least a portion of a thickness of the photoresist layer survives the exposing. For example, the photoresist layer includes an EUV resist layer and the etching gas includes CFgas, Ogas, and Ar gas. In another example, the exposing includes exposing the substrate to a) a plasma-excited etching gas containing CFgas, Ogas, and Ar gas, and b) exposing the substrate to a plasma-excited Ar gas, where steps a) and b) are sequentially performed at least once.

Method for dry etching silicon carbide films for resist underlayer applications

A substrate processing technique is described herein for etching layers, such as dielectric layers, and more particularly low k dielectric layers in a manner that minimizes etch lag effects. Multiple etch processes are utilized. A first etch process may exhibit etch lag. A second etch process is a multi-step process that may include a deposition sub-step, a purge sub-step and an etch sub-step. The second etch process may exhibit inverse etch lag. The second etch process may be a cyclic process which performs the deposition, purge and etch sub-steps a plurality of times. The second etch process may be an atomic layer etch based process, and more particularly a quasi-atomic layer etch. The combination of the first etch process and the second etch process may provide the desired net effect for the overall etch lag when etching the dielectric layer.

Method for reducing reactive ion etch lag in low K dielectric etching

A method for selectively etching a substrate is described. The method includes disposing a substrate comprising a silicon nitride (SiN) layer overlying silicon in a plasma etching system, and transferring a pattern to the silicon nitride layer using a plasma etch process, wherein the plasma etch process utilizes a process composition having as incipient ingredients a process gas containing C, H and F, and an additive gas including CO. The method further includes: selecting an amount of the additive gas in the plasma etch process to achieve: (1) a silicon recess formed in the silicon having a depth less than 10 nanometers (nm), and (2) a sidewall profile in the pattern having an angular deviation from 90 degrees less than 2 degrees.

Etch process for reducing silicon recess

A method of pattern etching a Si-containing anti-reflective coating (ARC) layer is described. The method comprises etching a feature pattern into the silicon-containing ARC layer using plasma formed from a process gas containing SFand a hydrocarbon gas. The method further comprises adjusting a flow rate of the hydrocarbon gas relative to a flow rate of the SFto reduce a CD bias between a final CD for nested structures in the feature pattern and a final CD for isolated structures in the feature pattern.

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A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in the lithographic layer using a lithographic process. Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the offset in the critical dimension (CD) bias is reduced between nested structures and isolated structures.

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West Charlton, NY, United States of America

Christopher Cole