Siemens Industry Software Gmbh

Mentor Graphics Corporation

Christopher Clifford

Germain Louis Fenger

Andrew Burbine

Konstantinos G Adam

John L Sturtevant

Ananthan Raghunathan

Michael Christopher Lam

Young Chang Kim

This application discloses a computing system to identify structures of an integrated circuit capable of being fabricated utilizing a lithographic mask described by mask layout data and to generate process windows for the identified structures based, at least in part, on the mask layout data and a failure definition for the identified structures. The computing system utilizes process windows for the identified structures to determine failure rates for the identified structures based on a distribution of the manufacturing parameters. The computing system determines frequency of occurrences for the identified structures from the mask layout data and generates a die yield metric for the integrated circuit by aggregating the failure rates for the identified structures based on the frequency of occurrences for the identified structures in the integrated circuit. These increases in yield of the integrated circuit allow manufacturers to produce more units per fixed processing cost of the wafer.

Die yield assessment based on pattern-failure rate simulation

This application discloses a computing system implementing an optical proximity correction model calibration tool to determine parameters for gauges describing features of an integrated circuit. The gauges include values corresponding to measurements collected for a set of the features. The optical proximity correction model calibration tool can ascertain densities of the gauges based on the measurements associated with the parameters for the gauges, and set weights for the gauges based, at least in part, on the densities. The optical proximity correction model calibration tool can calibrate an optical proximity correction (OPC) model using the weights for the gauges. The OPC model calibrated with the weights of the gauges can be utilized to predict of a printed image on a substrate described by a mask layout design corresponding to the integrated circuit.

Optical proximity correction modeling with density-based gauge weighting

Disclosed are techniques for processing layout designs based on dynamically-generated lithographic models. Lithographic models are determined for a plurality of regions of a reticle prior to lithographic simulation. During lithographic simulation, lithographic models for a small area within a particular region are generated based on the lithographic models for the particular region, the lithographic models for one or more neighboring regions, and location information of the small area relative to the region and to the one or more neighboring regions. The lithography models comprise illuminating and imaging system models and mask electro-magnetic field models.

Dynamic model generation for lithographic simulation

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Alameda, CA, United States of America

Christopher Clifford