Hamilton Sundstrand Corporation

Christopher Brian Noll

Steven A Avritch

Marcin Wroblewski

Jeffrey A Eldridge

Peter Martin Gilbert

Examples described herein provide a method for testing a memory associated with a processing system of an aircraft. The method includes performing, during operation of the processing system, an operational built-in test on the memory. The method further includes, responsive to detecting an error in the memory during the operational built-in test, performing a focused memory test at a location in the memory of the error. The method further includes, responsive the error being confirmed by the focused memory test, causing the processing system to be taken offline.

Built-in memory tests for aircraft processing systems

A system includes a computing system and a cable connector. The computing system includes a plurality of processors and an interconnect circuit configured to connect the plurality of processors to each other. The cable connector is configured to connect to the interconnect circuit and provide a channel identifier to the computing system, and the interconnect circuit is configured to set one of the plurality of processors as a system controller based on the channel identifier.

Selectable system controller for multi-processor computing systems

Systems and methods for command line voting are provided. Aspects include obtaining, by an output logic device, a plurality of memory blocks from a plurality of buffers, each of the plurality of memory blocks including two or more output commands generated from a processing circuit based on a sensor data input, generating, by a hash function, a hash value for each of the plurality of memory blocks, comparing the hash value for each of the plurality of memory blocks to determine an output memory block from the plurality of memory blocks, and outputting, to an output hardware, the two more output commands from the output memory block.

Command line voting using hashing

A pulse width modulation signaling system includes a first control channel that is configured to receive a hardware Boolean command input from a first hardware status monitor, receive a software multi-bit command input from a first software system, and generate a first pulse width modulated signal that is representative of the Boolean command input and the software multi-bit command input. The hardware Boolean command input is a binary value of either a first state or a second state, the software multi-bit command input includes a binary value of either a first state or a second state, and the first pulse width modulated signal defines a duty cycle.

PWM signaling and encoding multiple statuses

Embodiments in include a system, a method, and a computer program product for performing intelligent load shedding for multi-channel processing system. The embodiments include a multi-channel processing system, wherein each channel of the multi-channel processing system includes a plurality of processors, and a plurality of links coupling each channel with each other channel in the multi-channel processing system, wherein the links are used to transmit status information of the plurality of processors. The embodiments also include a plurality of cooling elements coupled to each channel having the plurality of processors, wherein the plurality of cooling elements are configured to remove heat from the multi-channel processing system.

Intelligent load shedding for multi-channel processing systems

According to an aspect, a sever system includes a non-volatile storage device with a plurality of loadable configuration data and a configurable sever logic circuit configured responsive to a transfer of the loadable configuration data to perform a plurality of operations. The operations include mapping a plurality of module-level sever logic inputs to a plurality of module-specific sever logic functions as defined in the loadable configuration data. The module-level sever logic inputs are monitored by the configurable sever logic circuit based on the module-specific sever logic functions for a sever condition. A sever command to disconnect one or more outputs of a plurality of modules is triggered based on the module-specific sever logic functions and the module-level sever logic inputs.

Controlling an aircraft comprising a plurality of loadable configuration sever data based on detecting one or more diagnostic test interfaces

One or more embodiments here relate to a processing platform for performing channel management and channel monitoring of a control channel. The processing platform includes a first microcontroller comprising a first core. The processing platform includes a second microcontroller comprising a second core. The second microcontroller is dissimilar to the first microcontroller. The first core is in an active state to perform the channel management of the control channel. The second core is in a monitor state to perform the channel monitoring of the control channel.

Runtime reconfigurable dissimilar processing platform

In one example, a method includes receiving, by a controller device from a master device operably connected to the controller device, a memory access request configured to request access to computer-readable memory of the controller device. The method further includes sampling, by the controller device, time-varying data received from a controlled device operably connected to the controller device, and generating, by the controller device in response to receiving the memory access request, an access key using the sampled time-varying data received from the controlled device. The method further includes transmitting, by the controller device, the generated access key to the master device, and enabling, by the controller device, access to the computer-readable memory of the controller device in response to data write commands received from the master device that include an access code based on the access key.

Access key generation for computer-readable memory

Multiple positions within a mechanical system are measured with a plurality of sensors including at least one 4-wire and at least one 5-wire sensor. The 5-wire sensor has two output voltage signals sent to a signal conversion processor, and the 4-wire sensor also sends a signal. A sum is created of the two voltage signals from the 5-wire sensor. An excitation voltage supply supplies a common excitation voltage to both sensors. Feedback of the excitation voltage is measured by the signal conversion processor. The excitation voltage feedback is utilized to ratio-metrically correct a position feedback signal from the 4-wire sensor at the signal conversion processor. The signal conversion processor is able to synthesize a signal indicative of the excitation voltage from the two voltage signals sent from the 5-wire sensor in the event the excitation voltage feedback is not received at the signal conversion processor.

Control voltage signal synthesis system and method

A multi-processor system includes a first processor that includes a first time base counter that outputs a first time base count, a second processor that includes a second time base counter that outputs a second time base count, and a communication bus. The first and second processors exchange the first and second time base counts on the communication bus. The first and second processors determine a skew based upon a difference between the first and second time base counts, and the first and second processors synchronize with each other based upon the skew.

Multi-processor synchronization using time base counters

A Human Machine Interface includes a flight control system operable to communicate display data directly to a cockpit display system.

Integrated flight control and cockpit display system

A controller has an output for supplying power to an output device. The controller monitors the supplied power to provide short-circuit protection to the output device. The controller also receives discrete inputs at the output based on the introduction of temporary short-circuit conditions introduced by a momentary switch connected between outputs of the controller in parallel with the output device. The controller detects short-circuit conditions in the output and distinguishes between short-circuit fault conditions and discrete inputs generated by activation of the momentary switch based on measured characteristics of the detected short-circuit conditions.

Discrete input signal generation via output short-circuit detection

A flight control system includes a dual stage actuator for moving a control surface. Each stage includes several control valves that are controlled independently to provide a desired redundancy. A flight controller generates a position command that is indicative of the position desired for the control surface. A first communication link is provided between several flight controllers to share information. Each of the flight controllers forwards the position command to actuator remote processing unit. The actuator remote processing unit receives position commands and generates a command signal that controls movement of the actuator using the control valves. Each of the actuator remote processing units is linked through a second communication link. Feedback and balancing of the different control valves is provided by the visibility accorded each actuator remote processing unit by the second communication link.

Redundant two stage electro-hydraulic servo actuator control

A method () for fault detection in a system under control includes monitoring a command value and a wraparound signal () by a fault detection module (); determining a standard deviation of the command value () by the fault detection module; determining a standard deviation of the wraparound signal () by the fault detection module; determining a ratio of the standard deviation of the command value to the standard deviation of the wraparound signal () by the fault detection module; and determining the presence or absence of a fault in the system under control by the fault detection module based on the ratio () by the fault detection module. A fault detection module () and a computer program product comprising a computer readable storage medium containing computer code that, when executed by a computer, implements a method () for fault detection are also provided.

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Glastonbury, CT, United States of America

Christopher Brian Noll