Integrated Device Technology, Inc.

Other

Applied Micro Circuits Corporation

Net Navagation Systems LLC

Christopher Bergen

Alexander Sgouros

Leonard Bush

Sourav Chakrabroty

Christopher I W Norrie

Robert James Divivier

Thomas J Norrie

Gurmohan Singh Samrao

Sourav Chakrobroty

An information packet preclassification system and method are provided. The method receives a packet of information and differentiates the packet into segments. Using a decision tree with multiple levels, segments in the packet are compared to a node at a tree level, where each node includes a plurality of node reference segments and corresponding node comparison operators. The reference segment may be a different segment from the packet, or a predetermined segment value stored in memory. One, or more classification attributes are accessed in response to comparing segments, and the classification attributes are assigned to the packet. Then, the packet is processed in response to the classification attributes.

Search tree algorithms

Packet preclassification search tree algorithms

Search tree algorithms for packet preclassification

Packet preclassification using search tree algorithms

A base address sorting device in a switching device is disclosed that includes an array of base address registers in which each base address register contains a base address, an address shifting device; and a control logic element electrically coupled to the array of base address registers and operable, upon receiving a configuration command comprising a new base address, to implement a method for reconfiguring the contents of the array of base address registers. The method includes determining an insertion point base address register in the array of base address registers into which to write the new base address, shifting the contents of one or more base address registers array to other base address registers to preserve the sorted order, and shifting the contents of the configuration command into the insertion point base address register. The inserting results in preserving the pre-determined order of the register array content.

Binary base address sorting method and device with shift vector

A base address matching device and method are disclosed. In a switching device having a plurality of input/output ports, a routing device has been described that has an array of registers in which each register holds content associating an address with one of the input/output ports in the switching device and elements of the content in the array of registers are pre-sorted into a specified order, and an address matching element that has a plurality of comparators that are electrically coupled to selected registers in the array of registers. The base address matching element is able to select a matching address from the content of the array of registers and to direct a communication packet to one of the ports in the switch by matching the target address in the packet to an address in the content of the register in the array of registers associated with the port.

Binary base address search device and method

An apparatus and method determine byte gain and loss adjustments that compensate for frequency differences between ingress and egress data rate signals in a SONET/SDH NE. The count of ingress data rate signal pulses at the time that data is requested by a switch fabric is compared to the count of egress data rate signal pulses at the time the requested data is passed through the switch fabric. If a delta phase equal to the difference in counts less a reference phase, is continuously greater than a positive value threshold for at least a time threshold period, then a byte gain adjustment is determined. On the other hand, if the delta phase is continuously less than a negative value threshold for at least the time threshold period, then a byte loss adjustment is determined.

Apparatus and method for determining byte gain and loss adjustments in a SONET/SDH network element

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Cupertino, CA, United States of America

Christopher Bergen